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Michael R. Butts

Altera

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Publication

Featured researches published by Michael R. Butts.

Archive | 1998

Emulation system with time-multiplexed interconnect

Stephen P. Sample; Mikhail Bershteyn; Michael R. Butts; Jerry R. Bauer

Archive | 2001

Memory circuit for use in hardware emulation system

Stephen P. Sample; Mikhail Bershteyn; Michael R. Butts; Jerry R. Bauer

Archive | 1999

I/O buffer circuit with pin multiplexing

Stephen P. Sample; Michael R. Butts; Kevin A. Norman; Rakesh H. Patel

Archive | 1998

Look-up table based logic element with complete permutability of the inputs to the secondary signals

Kevin A. Norman; Rakesh H. Patel; Stephen P. Sample; Michael R. Butts

Archive | 2001

Optimized emulation and prototyping architecture

Stephen P. Sample; Michael R. Butts

Archive | 1999

Programmable logic device with multi-port memory

Stephen P. Sample; Michael R. Butts; Kevin A. Norman; Rakesh H. Patel; Chao Chiang Chen

Archive | 1997

Diagnostic interface system for programmable logic system development

Kevin A. Norman; Rakesh H. Patel; Stephen P. Sample; Michael R. Butts

Archive | 2001

PLD with on-chip memory having a shadow register

Stephen P. Sample; Michael R. Butts; Kevin A. Norman; Rakesh H. Patel; Chao Chiang Chen

Archive | 2003

High-performance programmable logic architecture

Kevin A. Norman; Rakesh H. Patel; Stephen P. Sample; Michael R. Butts

Archive | 2000

FPGA with on-chip multiport memory

Stephen P. Sample; Michael R. Butts; Kevin A. Norman; Rakesh H. Patel; Chao Chiang Chen

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Stephen P. Sample

Altera

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Kevin A. Norman

Altera

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Rakesh H. Patel

Altera

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Chao Chiang Chen

Altera

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