Michael S.-C. Lu

Laminated high-aspect-ratio microstructures in a conventional CMOS process

Abstract Electrostatically actuated microstructures with high-aspect-ratio laminated-beam suspensions have been fabricated using a 0.8 μm three-metal CMOS process followed by a sequence of three maskless dry-etching steps. Laminated structures are etched of the CMOS silicon oxide, silicon nitride, and aluminum layers. The key to the process is the use of the CMOS metallization as an etch-resistant mask to define the microstructures. A minimum beam width of 1.2 μm, gap of 1.2 μm, and maximum beam thickness of 4.8 μm are obtained. These structural features will scale in size as the CMOS technology improves. The laminated material has an effective Youngs modulus of 61 GPa, an effective residual stress of 69 MPa, and a residual strain gradient of 2 × 10 −4 μm −1 . Multi-conductor electrostatic micromechanisms, such as self-actuating springs, x−y microstages, and nested comb-drive lateral resonators, are successfully produced. A self-actuating spring is a lateral electrostatic microactuator without a stator that is insensitive to out-of-plane curl. A spring 107 μm wide by 109 μm long excited by an 11 V a.c. signal has a measured resonance amplitude of 1 μm at 14.9 kHz. Finite-element simulation using the extracted value of Youngs modulus predicts the resonance frequencies of the springs to within 7% of the measured values.

Single-chip computers with microelectromechanical systems-based magnetic memory (invited)

This article describes an approach for implementing a complete computer system (CPU, RAM, I/O, and nonvolatile mass memory) on a single integrated-circuit substrate (a chip)—hence, the name “single-chip computer.” The approach presented combines advances in the field of microelectromechanical systems (MEMS) and micromagnetics with traditional low-cost very-large-scale integrated circuit style parallel lithographic manufacturing. The primary barrier to the creation of a computer on a chip is the incorporation of a high-capacity [many gigabytes (GB)] re-writable nonvolatile memory (in today’s terminology, a disk drive) into an integrated circuit (IC) manufacturing process. This article presents the following design example: a MEMS-based magnetic memory that can store over 2 GB of data in 2 cm2 of die area and whose fabrication is compatible with a standard IC manufacturing process.

Position control of parallel-plate microactuators for probe-based data storage

In this paper, we present the use of closed-loop voltage control to extend the travel range of a parallel-plate electrostatic microactuator beyond the pull-in limit. Controller design considers nonlinearities from both the parallel-plate actuator and the capacitive position sensor to ensure robust stability within the feedback loop. Desired transient response is achieved by a pre-filter added in front of the feedback loop to shape the input command. The microactuator is characterized by static and dynamic measurements, with a spring constant of 0.17 N/m, mechanical resonant frequency of 12.4 kHz, and effective damping ratio from 0.55 to 0.35 for gaps between 2.3 to 2.65 /spl mu/m. The minimum input-referred noise capacitance change is 0.5 aF//spl radic/Hz measured at a gap of 5.7 /spl mu/m, corresponding to a minimum input-referred noise displacement of 0.33 nm//spl radic/Hz. Measured closed-loop step response illustrates a maximum travel distance up to 60% of the initial gap, surpassing the static pull-in limit of one-third of the gap.

An Integrated Low-Noise Sensing Circuit With Efficient Bias Stabilization for CMOS MEMS Capacitive Accelerometers

A sensing circuit in 0.35 μm CMOS technology for CMOS MEMS capacitive accelerometers has been designed in this work with emphasis on managing noise, sensor offset, and the dc bias at input terminals. The issue of dc bias is particularly addressed and an efficient method is proposed. An example of integrating surface micromachined sensors and the designed sensing circuits on the same chip is demonstrated. Experimental results showed that the proposed circuit led to good noise performance, the random offset in the sensors was efficiently compensated, and the input dc bias voltage was well maintained. The sensitivity of the accelerometer is 457 mV/g. The output noise floor is 54 μg/√Hz, which corresponds to an effective capacitance noise floor of 0.0162 aF/√Hz. The total area of the dual-axis surface micromachined accelerometer chip is 5.66 mm2 and the current consumption is 1.56 mA under a 3.3 V voltage supply.

CMOS micromachined capacitive cantilevers for mass sensing

In this paper, we present the design, fabrication and characterization of the CMOS micromachined cantilevers for mass sensing in the femtogram range. The cantilevers consisting of multiple metal and dielectric layers are fabricated after completion of a conventional CMOS process by dry etching steps. The cantilevers are electrostatically actuated to resonance by in-plane electrodes. The mechanical resonant frequency is detected capacitively with on-chip circuitry, where the modulation technique is applied to eliminate capacitive feedthrough from the driving port and to lessen the effect of flicker noise. The highest resonant frequency of the cantilevers is measured at 396.46 kHz with a quality factor of 2600 at 10 mTorr. The resonant frequency shift after deposition of a 0.1 µm SiO2 layer is 140 Hz, averaging 353 fg Hz−1.

Ultrasensitive and label-free detection of pathogenic avian influenza DNA by using CMOS impedimetric sensors.

This work presents miniaturized CMOS (complementary metal oxide semiconductor) sensors for non-faradic impedimetric detection of AIV (avian influenza virus) oligonucleotides. The signal-to-noise ratio is significantly improved by monolithic sensor integration to reduce the effect of parasitic capacitances. The use of sub-μm interdigitated microelectrodes is also beneficial for promoting the signal coupling efficiency. Capacitance changes associated with surface modification, functionalization, and DNA hybridization were extracted from the measured frequency responses based on an equivalent-circuit model. Hybridization of the AIV H5 capture and target DNA probes produced a capacitance reduction of -13.2 ± 2.1% for target DNA concentrations from 1 fM to 10 fM, while a capacitance increase was observed when H5 target DNA was replaced with non-complementary H7 target DNA. With the demonstrated superior sensing capabilities, this miniaturized CMOS sensing platform shows great potential for label-free point-of-care biosensing applications.

A CMOS Micromachined Capacitive Tactile Sensor With High-Frequency Output

This paper describes the design and characterization of a CMOS-micromachined tactile sensing device that can be utilized for fingerprint recognition. The complete post micromachining steps are performed at die level without resorting to a wafer-level process, providing a low-cost solution for production. The micromechanical structure has an area of 200 mum by 200 mum and an initial sensing capacitance of 153 fF. An oscillator circuit is used to convert the pressure induced capacitance change to a shift in output frequency. The circuit has a measured initial frequency at 49.5 MHz under no applied force. The total frequency shift is 14 MHz with a corresponding mechanical displacement of 0.56 mum and a capacitance change of 63 fF, averaging a capacitive sensitivity of 222 kHz/fF. The measured spring constant is 923N/m, producing a force sensitivity of 27.1 kHz/muN

CMOS Open-Gate Ion-Sensitive Field-Effect Transistors for Ultrasensitive Dopamine Detection

Open-gate ion-sensitive field-effect transistors (ISFETs) are presented in this paper to provide a real-time ultrasensitive dopamine (DA) detection in the femtomolar (fM) range. The polysilicon gates of p-type FETs fabricated in a 0.35-μm complementary metal-oxide-semiconductor (CMOS) process were removed by a convenient post-CMOS process to expose the gate oxide for surface functionalization and biomolecule immobilization. The measured current value increased due to the produced negative charges from binding of the 4-carboxyphenylboronic acid and DA molecules. The thin gate oxide, as the sensing interface, significantly enhances the detection limit, which is comparable to or better than most nanowire-based ISFETs. A self-oscillating readout circuit was used to convert the ISFET current to a digital output for the measurement of multiple sensors, showing the strength of the CMOS-based approach for sensor integration.

5 × 5 CMOS capacitive sensor array for detection of the neurotransmitter dopamine

This work presents miniaturized CMOS (complementary metal oxide semiconductor) capacitive sensors for detection of the neurotransmitter dopamine (DA) down to the sub-fM range. Sensing resolution is significantly enhanced by monolithic sensor integration to reduce the parasitic effect and the use of sub-μm interdigitated microelectrodes as the sensing interface. The 5 × 5 sensor array contains five designs of different electrode sizes and each design has five sensors. The positive charges produced from protonation of boronate and amino group after immobilization of 4-carboxyphenylboronic acid (CPBA) result in an increase of the electrode-analyte capacitance. Then the negative charges produced after binding of CPBA and DA molecules decrease the electrode-analyte capacitance. Signal transduction is achieved through a CMOS readout circuit whose output frequency is inversely proportional to the capacitance. Experimental results showed the ratios of average percentage capacitance changes of the experiment groups over those of the control groups were all larger than one for the five designs at DA concentration of 0.1 fM. Selectivity against the non-analyte species, such as tyramine, has also been demonstrated.

A CMOS Micromachined Capacitive Sensor Array for Fingerprint Detection

Biometric techniques, such as fingerprint detection, have been widely applied to identify a specific user for security and safety reasons. This work presents an integrated capacitive sensor array for fingerprint detection based on the difference of pressures induced by the ridges and valleys of a finger tip. The 8 × 32 sensing membranes are released by wet etch of the complementary metal oxide semiconductor (CMOS) metal layers and no additional thin-film deposition is required to form the capacitive electrodes. Each membrane contains the CMOS dielectric and metal layers with a total thickness of 3.375 μm. The size of each sensing pixel is 65 × 65 μm3, equivalent to an imaging resolution of 390 dpi. The sensing capacitance and capacitive sensitivity are 12 fF and 1.41 fF/MPa, respectively. The measured spring constant of the membrane is close to the simulated value of 1400 N/m. Part of the fingerprint image is successfully produced by the CMOS sensor array.