Michelle Cutajar

Comparative study of automatic speech recognition techniques

Over the past decades, extensive research has been carried out on various possible implementations of automatic speech recognition (ASR) systems. The most renowned algorithms in the field of ASR are the mel-frequency cepstral coefficients and the hidden Markov models. However, there are also other methods, such as wavelet-based transforms, artificial neural networks and support vector machines, which are becoming more popular. This review article presents a comparative study on different approaches that were proposed for the task of ASR, and which are widely used nowadays.

Support Vector Machines with the priorities method for speaker independent phoneme recognition

A speaker independent phoneme recognition system, based on Support Vector Machines (SVMs) method was improved by adding a priority scheme to forecast the three most likely phonemes. The system helps improve the obtained recognitions rate. For the phoneme recognition system, four multiclass SVMs methods, the All-at-once, One-against-all, One-against-one, and the Directed Acyclic Graph SVM (DAGSVM), were designed. The One-against-one method performed best, achieving an accuracy of 53.70%. This accuracy was further increased to 75.41%, when the second and third priorities were considered in the priorities method. All tests were carried out on the TIMIT database.

Hardware-based support vector machine for phoneme classification

This paper presents the design of a digital hardware implementation based on Support Vector Machines (SVMs), for the task of multi-speaker phoneme recognition. The One-against-one multiclass SVM method, with the Radial Basis Function (RBF) kernel was considered. Furthermore, a priority scheme was also included in the architecture, in order to forecast the three most likely phonemes. The designed system was synthesised on a Xilinx Virtex-II XC2V3000 FPGA, and evaluated with the TIMIT corpus. This phoneme recognition system is intended to be implemented on a dedicated chip, along with the Discrete Wavelet Transforms (DWTs) for feature extraction, to further improve the resultant performance.

Discrete wavelet transforms with multiclass SVM for phoneme recognition

A phoneme recognition system based on Discrete Wavelet Transforms (DWT) and Support Vector Machines (SVMs), is designed for multi-speaker continuous speech environments. Phonemes are divided into frames, and the DWTs are adopted, to obtain fixed dimensional feature vectors. For the multiclass SVM, the One-against-one method with the RBF kernel was implemented. To further improve the accuracies obtained, a priority scheme was added, to forecast the three most likely phonemes. After classification, all frames were again re-grouped, in order to evaluate the accuracy of the system according to the substitution, deletion and insertion errors. The percentage correct and accuracy, obtained from the designed phoneme recognition system, were 63.08% and 53.27% respectively. All tests were carried out on the TIMIT database. This phoneme recognition system is intended to be implemented on a dedicated chip, to improve the speed of the software implementation by approximately 100 times.

Digital hardware implementation of Self-Organising Maps

In this paper a digital hardware implementation of the Self-Organising Maps (SOMs) for the application of handwritten digit recognition is presented. Two methods were implemented: Euclidean and Manhattan method. The highest recognition rate for both methods was calculated through three testing techniques. The highest recognition rates obtained are 71.267% and 63.667% for the Euclidean and the Manhattan methods respectively. Both methods were implemented on the Xilinx Spartan-3 200K gates (XC3S200) to compare their speed performance and area consumed.

Comparison of different multiclass SVM methods for speaker independent phoneme recognition

Four multiclass Support Vector Machines (SVMs) methods were designed for the task of speaker independent phoneme recognition. These are the All-at-once, One-against-all, One-against-one, and the Directed Acyclic Graph SVM (DAGSVM). The Discrete Wavelet Transform (DWT) 8 frequency band power percentages are used for feature extraction. All tests were carried out on the TIMIT database. Comparable recognition rates were obtained from all designed systems. However, the One-against-One method performed best, achieving an accuracy of 53.70% for multi-speaker unlimited vocabulary speech. The phoneme recognition system, adopting the DWT and the One-against-one method, are intended to be implemented on a dedicated chip. The dedicated chip will improve the speed performance by approximately 100 times when comparing the hardware setup with the software implementation. This is obtained by providing the hardware parallelism, which accommodates the algorithms that have been used.

Design of a hardware-based discrete wavelet transform architecture for phoneme recognition

This paper presents the design of a digital hardware implementation based on Discrete Wavelet Transforms (DWTs) for the task of feature extraction in a multi-speaker phoneme recognition system. This is the first research where the design of a hardware-based DWT design is directed towards a speech recognition application. In the proposed architecture, the lifting-scheme approach employing the orthogonal Daubechies wavelet of order 5 was considered. The designed system was synthesised on a Xilinx Virtex-II XC2V3000 FPGA, and evaluated with the TIMIT corpus. This hardware-based DWT architecture is then intended to be implemented on a dedicated chip, along with the hardware implementation of the classification stage of the proposed phoneme recognition system, in order to further improve the resultant performance.

ASIC design of a phoneme recogniser based on discrete wavelet transforms and support vector machines

This paper presents the design of an ASIC for the task of multi-speaker phoneme recognition in continuous speech environments. The phoneme recogniser is based on DWTs for feature extraction and the One-against-one SVM method, along a priorities scheme, for classification. The ASIC design was fabricated on an AMS 0.35μ CMOS C35B4C3 chip. The final ASIC design resulted into a chip size equal to 43.35mm2, with the requirement of an external memory storage of size 18.25Mb. Moreover, the ASIC design of the phoneme recogniser is approximately 4 times faster than the equivalent software-based approach and consumes 12.5mW, making it appealing to mobile devices. The performance results obtained from the ASIC design confirmed that this system is a promising basis for future hardware ASR systems.

A study on pitch variation on the use of DWT with SVM for speaker independent phoneme recognition

A phoneme recognition system based on Discrete Wavelet Transforms (DWTs) and Support Vector Machines (SVMs), is designed for speaker-independent continuous speech environments. This research studies the pitch variation present in a speech signal, due to gender difference, and whether an increase is obtained if male and female speakers are considered separately. The results obtained show, that the designed system, is robust to pitch variation present in speech signals. On average, the same accuracies are obtained for the case when all speakers are considered, and for the cases when the male and female speakers are considered separately. The percentage correct and accuracy, obtained from the designed phoneme recognition system, when all speakers were considered, were 64.38% and 55.08% respectively. All tests were carried out on the TIMIT database. This study has been carried out to analyse the performance of the system before actually moving on to the implementation of a dedicated chip, which is intended to enhance the speed performance of the system.

An FPGA embedded system architecture for handwritten symbol recognition

This paper presents the design of an FPGA-based embedded system architecture for handwritten symbol recognition. The recognition algorithm is based on a self-organizing map neural network and was implemented on a Xilinx XC3S500E FPGA. The neural network operates on a set of chosen symbol features, rather than on the symbol image itself, in order to reduce memory requirements. The implemented system was tested as part of a hand-held calculator application, where an average recognition rate of 85 % was achieved for digit and mathematical symbol operators, which are entered on a touch screen by means of a stylus. The processing load demanded by the implementation is efficiently shared between soft-core processors and other digital logic blocks implemented on the same FPGA, thus employing minimal hardware resources.