Min-Bo Zhou

Creep behavior of Cu/Sn-3.0Ag-0.5Cu/Cu solder joints under tensile stress coupled with DC current stressing

Creep behavior of microscale Cu/Sn-3.0Ag-0.5Cu/Cu joints with different thicknesses under electric current stressing was studied in comparison with those without current stressing. The effect of current stressing on creep mechanism was characterized by calculation of the stress exponent (n) of the steady-state creep rate and fractographic analysis of fractured joints. Results show that creep curves of solder joints under current stressing consist of three distinct stages, namely the primary, secondary and tertiary stages. With increasing current density, the steady-state creep rate increases significantly while the creep lifetime decreases. The higher the electric current density is, the higher the steady-state creep rate is and the lower the creep lifetime is. The decrease of joint thickness leads to decrease in steady-state creep rate and increase in creep lifetime under current stressing. The steady-state creep rate of solder joints with a large thickness is more sensitive to the change of the applied tensile stress than that with a small thickness. The value of the stress exponent (n) varies with the current density and joint thickness. Decrease in joint thickness brings about the change of the fracture location from the middle of the solder matrix to the transition region between the solder/Cu6Sn5 interface and solder matrix, and correspondingly the fracture mode tends to transform from ductile to a mixed ductile-brittle mode of fracture.

Phase Field Simulation of Segregation of the Bi-Riched Phase in Cu/Sn-Bi/Cu Solder Interconnects under Electric Current Stressing

The migration and segregation of Bi atoms in Cu/Sn-Bi/Cu solder interconnects under electric current stressing usually induce the formation of Bi-riched layers at the anode side, which can cause the failure of solder interconnects easily. In our study, the microstructure evolution of the eutectic Sn-Bi solder in a Cu/Sn-Bi/Cu flip chip solder joint and a right-angle Cu/Sn-Bi/Cu solder interconnect is simulated by phase field method. Further, the phase field equation is coupled with the Laplace equation governing the electric potential to simulate the segregation of the Bi-riched phase in Cu/Sn-Bi/Cu solder interconnects, in which the Bi-riched phase and Sn-riched phase inhomogeneously distribute. The coarsening behavior of the eutectic microstructure can also be seen in the simulation results, and the phases grow and become coarse along multiple directions in the flip chip solder interconnect compared with that in the right-angle solder interconnect. Under electric current stressing, Bi atoms migrate towards the anode side, while Sn atoms move in the opposite direction, and finally a segregated layer of Bi-riched phase is formed at the anode side, which is consistent with the experimental studies. The phase separation first occurs near the bottom corner of the right-angle solder interconnect. Moreover, the inhomogeneity of microstructures can influence the current density distribution, and the electromigration and segregation of the Bi-riched phase can induce the increase of both the voltage and resistance.

Morphological evolution and migration behavior of the microvoid in Sn/Cu interconnects under electrical field studied by phase-field simulation

Microvoids usually form at the interface between the Sn-based solder and Cu substrate during aging process. The existence and growth (electromigration and coalescence) of the microvoids can decrease the reliability of solder joints, in particular for the joints undergoing electrical current stressing of high density. In this paper, a diffuse interface model is employed to simulate the morphological evolution and migration behavior of microvoids in the solder interconnect consisting of the Sn-based solder and Cu substrate (i.e., Sn/Cu system), under electrical fields. Simulations take into account the coupled effect of surface diffusion and electrical field. The order parameter equation and electrical field equation are solved by using the finite difference method. The validity of this method is confirmed by the agreement of the evolution of noncircular microvoids driven by surface energy with that predicted theoretically. Simulation results show that the electrical field has significant influence on the morphological evolution of microvoids. The circular microvoids migrate from the region with high electric potential to the region with low potential under electrical field. Moreover, the migration velocity of the microvoid is constant. With increasing the voltage, the migration rate increases and under a high voltage the severe migration of microvoid may lead to a failure of the solder interconnect by the electromigration or coalescence of microvoids.

Electromigration induced microstructure evolution and damage in asymmetric Cu/Sn-58Bi/Cu solder interconnect under current stressing

Abstract The electromigration induced microstructure evolution and damage in asymmetric Cu/Sn-58Bi/Cu solder interconnects were investigated by in-situ SEM observation, focused ion beam (FIB) microanalysis and finite element (FE) simulation. The SEM results show that the electromigration-induced local degradation of microstructures, i.e., segregation of Bi-rich phase and formation of microcracks, in the asymmetric solder interconnects is much severer than that in the symmetrical ones. FIB-SEM microanalysis reveals that the microregional heterogeneity in electrical resistance along different electron flowing paths is the key factor leading to non-uniform current distribution and the resultant electromigration damage. Theoretical analysis and FE simulation results manifest that the current crowding easily occurs at the local part with smaller resistance in an asymmetric solder interconnect. All results indicate that the asymmetric shape of the solder interconnect brings about the difference of the electrical resistance between the different microregions and further results in the severe electromigration damage.

Microstructure Simulation and Thermo-Mechanical Behavior Analysis of Copper Filled Through Silicon Vias Using Coupled Phase Field and Finite Element Methods

High thermo-mechanical stresses are usually induced in through silicon via (TSV) structures due to the mismatch of coefficients of thermal expansion (CTE) between copper and silicon in Cu filled TSVs, which has brought an increasing concern for the reliability problems during fabrication process and operation of electronic devices. The size, shape and orientation of Cu grains in TSVs and their effects on thermo-mechanical behavior of TSVs can not be ignored, especially with the continuous miniaturization and increasing integration of 3D ICs. In this study, the dynamic evolution characteristics of grain growth in a Cu filled TSV are simulated by a two-dimensional phase field model firstly, and then the thermo-mechanical behavior of the TSV with different grain morphologies under annealing condition is investigated by finite element method (FEM), and finally the interaction effects of grain growth and thermo-mechanical behavior in the TSV during operation of electronic devices are studied.

Numerical simulations of migration and coalescence behavior of microvoids driven by diffusion and electric field in solder interconnects

Abstract A diffuse interface model is developed to simulate the effect of electric field on the morphological evolution and migration behavior of the microvoid in the solder interconnect consisting of the Sn based solder and Cu substrate (i.e., Sn/Cu system). The model takes into account the coupled effect of surface diffusion and electric field, and the validity of the model is confirmed by good agreement between the simulation and theoretical predictions in terms of evolution behavior of the noncircular microvoid driven by surface energy. The results show that the coalescence of microvoids driven only by surface energy occurs when the microvoids contact each other. The evolution and migration of the microvoid under electric field are governed by the magnitude of electric field and the initial size of the microvoid. The microvoid migrates at a constant velocity under a weak electric field, while the strong electric field results in the shape change of the microvoid from circular to narrow crack-like. In addition, the migration velocity of the microvoid increases linearly with the voltage and is inversely proportional to the size of the microvoid; a small microvoid can catch up with a large one, and finally they merge to form a larger microvoid, which may promote the open circuit failure near the solder/Cu interface in solder interconnects.

The Melting Characteristics and Interfacial Reactions of Sn-ball/Sn-3.0Ag-0.5Cu-paste/Cu Joints During Reflow Soldering

In this work, the melting characteristics and interfacial reactions of Sn-ball/Sn-3.0Ag-0.5Cu-paste/Cu (Sn/SAC305-paste/Cu) structure joints were studied using differential scanning calorimetry, in order to gain a deeper and broader understanding of the interfacial behavior and metallurgical combination among the substrate (under-bump metallization), solder ball and solder paste in a board-level ball grid array (BGA) assembly process, which is often seen as a mixed assembly using solder balls and solder pastes. Results show that at the SAC305 melting temperature of 217°C, neither the SAC305-paste nor the Sn-ball coalesce, while an interfacial reaction occurs between the SAC305-paste and Cu. A slight increase in reflow temperature (from 217°C to 218°C) results in the coalescence of the SAC305-paste with the Sn-ball. The Sn-ball exhibits premelting behavior at reflow temperatures below its melting temperature, and the premelting direction is from the bottom to the top of the Sn-ball. Remarkably, at 227°C, which is nearly 5°C lower than the melting point of pure Sn, the Sn-ball melts completely, resulting from two eutectic reactions, i.e., the reaction between Sn and Cu and that between Sn and Ag. Furthermore, a large amount of bulk Cu6Sn5 phase forms in the solder due to the quick dissolution of Cu substrate when the reflow temperature is increased to 245°C. In addition, the growth of the interfacial Cu6Sn5 layer at the SAC305-paste/Cu interface is controlled mainly by grain boundary diffusion, while the growth of the interfacial Cu3Sn layer is controlled mainly by bulk diffusion.

The influence of imposed electric current on the tensile fracture behavior of micro-scale Cu/Sn-3.0Ag-0.5Cu/Cu solder joints

The fracture behavior of microscale lead-free Sn-3.0Ag-0.5Cu solder joints under electrotensile load was characterized, in comparison with those under pure tensile load. Experimental results show that under electrotensile load the stress-strain and strain-time curves of joints exhibit three distinct stages, i.e., the fast deformation stage at the beginning of loading, linear deformation stage and the accelerating fracture stage. No significant difference in strain feature between the electrotensile loaded joint and pure tensile loaded joint was observed. The solder joints under electrotensile loading and tensile loading exhibit the same fracture mechanism at the same thickness-to-diameter ratio of joints, while the fracture strength of solder joints under electrotensile load is decreased greatly compared with that under pure tensile load, even lower than that of the bulk solder. Moreover, the orientation of β-Sn grains may tend to rearrange along the direction of current stressing under electrotensile loading.

Interaction effect between electromigration and microstructure evolution in BGA structure Cu/Sn-58Bi/Cu solder interconnects

Dimension of solder interconnects (or joints) and pitches has been continuously scaling down, resulting in inhomogeneous microstructure and severe electromigration (EM) effect in solder interconnects. In this study, the interaction effect between electromigration and microstructure evolution in ball grid array (BGA) structure Cu/Sn-58Bi/Cu solder interconnects under a direct current density of 1.5×108 A/m2 is studied by cellular automaton (CA) modeling embedded with finite element (FE) simulation. Results show that, compared with configuration or geometry of BGA interconnects, the influence of inhomogeneous eutectic phases on the distribution of current density is more obvious. The current density in the Sn-rich phase is much higher than that in the Bi-rich phase. Bi atoms in Sn-rich phase are more prone to migrate to the anode first, rather than migrating directly along the interface between Bi-rich phase and Sn-rich phase. Consequently, the damage in the Sn-rich phase, rather than at phase interfaces or in the Bi-rich phase, could usually be observed in experiments. By employing the criterion of EM induced atomic flux of Bi in FE analysis under CA rules, simulation results of Bi-rich phase segregation are consistent with the experimental observation under current stressing.

Influence of geometry of microbump interconnects on thermal stress and fatigue life of interconnects in copper filled through silicon via structure

Through silicon via (TSV) is an emerging technology enabling three dimensional (3D) packaging through vertical interconnection between multiple chips, which can significantly increase I/O per unit area, reduce electrical resistance as well as RC delay, and miniaturize the solder interconnects. However, it can also dramatically increase the current density and thermal energy density in each interconnect meanwhile. Thus, the reliability of miniaturized interconnects should be paid more attention. In this study, the influence of geometry of microbump interconnects, in terms of standoff height (h) and contact angle (θ), on thermal stress and fatigue life of interconnects in TSV structures under thermal cycling loading conditions was investigated by finite element (FE) method. Simulation results show that high thermal stress (herein, the equivalent stress) zones locate at Cu/Si interfaces and microbump interconnects. Considering that interconnects are the weakest part in the packaging system, their thermal stress and thermal fatigue behaviors were further investigated, and results reveal that the microbump interconnects in the lower microbump interconnect array are more vulnerable compared with that in upper arrays, and the outmost microbump interconnects in each interconnect array are most dangerous during the thermal cycling load. Furthermore, the influences of both h and θ on the fatigue life of the dangerous microbumps were calculated by using the modified Darveauxs energy based method. Calculation results reveal that increasing decreasing h and increasing θ improve the fatigue life of microbump interconnects. Besides, the thermal stress has no necessary connection with fatigue life, whereas the thermal strain (which is influenced by the thermal stress, structure factors and triaxial stress state) is closely related to the plastic strain energy and should be taken into account in evaluation of fatigue life of solder microbump interconnects in TSV structures.