Mineo Miura
Rohm
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Publication
Featured researches published by Mineo Miura.
the international power electronics conference - ecce asia | 2010
Takashi Nakamura; Masashi Sasagawa; Yuki Nakano; Takukazu Otsuka; Mineo Miura
The high current SiC MOSFETs and high-temperature operation IPM with SiC MOSFETs were fabricated. 300A switching in inductive load circuits was performed using a single chip SiC trench MOSFET. And 250 °C (the junction temperature of SiC DMOSFETs) operation of SiC IPMs with a new high-temperature bonding method and high-temperature materials (case, encapsulation) was successfully performed.
Japanese Journal of Applied Physics | 2002
Jun Suda; Syun-ichi Nakamura; Mineo Miura; Tsunenobu Kimoto; Hiroyuki Matsunami
Scanning capacitance microscopy (SCM) and scanning spreading resistance microscopy (SSRM) of a SiC multiple-pn-junction structure are presented. The structure was grown by atmospheric-pressure chemical vapor deposition using silane, propane and hydrogen. Nitrogen and diborane were used for n- and p-type doping gases, respectively. The SCM and SSRM results are compared with those of secondary ion mass spectrometry (SIMS). The 0.2-µm-thick n-type layer and 0.3-µm-thick p-type layer with a doping level of 1.5 ×1017 cm-3 in the multiple pn-junction were clearly resolved by both SCM and SSRM as well as SIMS.
Materials Science Forum | 2012
Masatoshi Aketa; Yuta Yokotsuji; Mineo Miura; Takashi Nakamura
This paper presents three different structures of Schottky diodes that were fabricated with low Schottky barrier heights. To reduce the forward voltage drop, the introduction of a lower Schttoky barrier is necessary. One of key issues associated with diodes having a low Schottky barrier height and a planar structure is an excessively high leakage current. By introducing the novel trench structure, the leakage current was reduced to a reasonable level. Furthermore it was confirmed that they have minimal switching time during turn-off and high avalanche capability. Thus trench structure Schottky diodes are able to reduce not only switching losses but also conductive losses and demonstrate sufficient robustness.
international symposium on vlsi design, automation and test | 2011
Takashi Nakamura; Yuki Nakano; Masashi Sasagawa; Takukazu Otsuka; Masatoshi Aketa; Mineo Miura
The expectation for SiC devices in advanced power electronics applications for saving energy has been still larger. The 4H-SiC planer MOSFETs with high blocking voltage (1300V) and large current (40A) were fabricated. In addition, we have succeeded in fabricating the larger current (300A) 4H-SiC trench MOSFET with low-on resistance (2.6mΩcm2). And, regarding high-temperature operation, SiC IPMs can be successfully fabricated by using a new bonding soldering method which can withstand even 400°C.
Archive | 2007
Satoshi Tanimoto; Noriaki Kawamoto; Takayuki Kitou; Mineo Miura
Physica Status Solidi (a) | 2009
Takashi Nakamura; Mineo Miura; Noriaki Kawamoto; Yuki Nakano; Takukazu Otsuka; Keiji Okumura; Akira Kamisawa
Archive | 2009
Mineo Miura
PCIM Europe 2016; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management; Proceedings of | 2016
Naoyuki Kizu; Satoru Nate; Mineo Miura; Masaharu Nakanishi; Nobuhiro Hase; Noriaki Kawamoto; Kazuhide Ino
Archive | 2016
Keiji Okumura; Mineo Miura; Yuki Nakano; Noriaki Kawamoto; Hidetoshi Abe
Archive | 2014
Mineo Miura