Minho Cheong

A Hardware Efficient LDPC Encoding Scheme for Exploiting Decoder Structure and Resources

Previously, there has been no report on implementation effort to integrate LDPC encoder and decoder into a single hardware. In this paper, we propose a simple yet low complex systematic LDPC encoding method for class of quasi-cyclic low-density parity-check (QC-LDPC) codes to let LDPC encoder acquire an interchangeable structure, exploited in the decoder. With the proposed encoding scheme, implementation of the proposed encoder becomes much more hardware efficient than having a separate hardware due to LDPC encoder and decoder resource sharing. Moreover, the overall computational complexity of the proposed encoding scheme is lower than the well-known Richardsons efficient encoding scheme (A.T.J. Richardson and R.L. Urbanke, 2001).

Arbitrary Bit Generation and Correction Technique for Encoding QC-LDPC Codes with Dual-Diagonal Parity Structure

In this paper, we propose a simple yet low complex systematic LDPC encoding method for class of quasi-cyclic low-density parity-check (QC-LDPC) codes which have an efficient encoding/decoding algorithm due to the simple structure of their parity-check matrices. The proposed encoding method is applicable to parity-check matrices having dual-diagonal parity structure with single column of weight 3. Unlike finding a direct solution for parity bits in schemes (Richardson and Urbanke, 2001 and Classon and Blankeship, 2004), the proposed scheme first generates arbitrary parity bits. Then, given the parity bits for the first sub-block and exploiting the dual-diagonal structure, all parity bits are found through correction. With slight modification of parity-check matrix H, proposed LDPC encoding scheme is directly applicable to matrices defined in IEEE physical layer standards with almost negligible performance loss. Moreover, the overall computational complexity involving encoding process is lower than well-known Richardsons efficient encoding scheme (Richardson and Urbanke, 2001).

Row-Splitting Design of Low-Density Parity-Check Codes for Gbps Transmission

In this paper, we propose a design methodology of low-density parity check (LDPC) code for very high speed transmission. To support various code rates with reasonable hardware and, possibly, the type-II hybrid automatic repeat request (HARQ), a row-splitting/combining method is employed in conjunction with shortening. In row-splitting approach, a parity check matrix of a high rate mother LDPC code, saying rate 5/6, is designed first and then successively row-split the mother matrix to obtain lower rate codes. Shortening provides us another degree of freedom for rate and frame length flexibility for concatenation with MIMO system. The code performance is investigated in terms of frame error rate and compared with those of the LDPC code proposed in IEEE 802.16e standard.

A New MIMO System for Gbps Transmission

In this paper, a receiver algorithm for an 8times8 MIMO system is considered for Giga-bps data transmission, in which the decoding complexity and latency are crucial factors for implementation of MIMO system with large number of transmit and receive antennae. To reduce computational complexity and the decoding latency, a 3-stage receiver algorithm is proposed. The MIMO receiver consists of multi-dimensional detection, partial interference cancellation and the weighted zero-forcing equalization, where the transmit antennae are divided into two group. The first group is encoded by a lower rate code and multi-dimensional search algorithm is used for demodulation and decoding, while the second group is encoded by higher rate code and weighted zero-forcing equalization is used. Once the first group is decoded successfully, they are cancelled out from the received vector for the decoding of the second group. The complexity and the error rate performance are investigated and compared with a well-known sphere decoding algorithm.

Low-Complexity ZF Detection for Double Space-Frequency Transmit Diversity Based OFDM System in Frequency Selective Fading Channel

In this paper, we propose an efficient low complexity MIMO detection method for double space-frequency transmit diversity (D-SFTD) based coded OFDM system. The proposed MIMO detector involves three-step filtering process to efficiently de-correlate spatially-multiplexed and space-frequency-coded signals without direct matrix inversion process. As the proposed MIMO detector takes advantage of frequency selectivity, not a favorable channel condition for SFBC system, performance degradation caused by low correlation between two consecutive subcarriers is compensated by assigning weighting factor per subcarrier. From computer simulation results, our scheme in D-SFTD outperforms previously proposed suboptimal MIMO detection methods such as iterative interference cancellation based V-BLAST.

Row-splitting design of Low-Density Parity-Check Codes for Gbps wireless transmission

In this paper, we propose a design methodology of low-density parity check (LDPC) code for very high speed wireless transmission. To support various code rates with reasonable hardware a row-splitting/combining method is employed in conjunction with shortening. In row-splitting approach, a parity check matrix of a high rate mother LDPC code, saying rate 4/5, is designed first and then successively row-split the mother matrix to obtain lower rate codes. Shortening provides us another degree of freedom for rate and frame length flexibility for concatenation with MIMO system. The code performance is investigated in terms of frame error rate and compared with those of the LDPC code proposed in IEEE 802.16e standard.

A new MIMO algorithm for high data rate transmission

In this paper, a receiver algorithm for an 8x8 MIMO system is considered for Giga-bps data transmission, in which the decoding complexity and latency are crucial factors for implementation of MIMO system with large number of transmit and receive antennae. To reduce computational complexity and the decoding latency, a 3-stage receiver algorithm is proposed. The MIMO receiver consists of multidimensional detection, partial interference cancellation and the weighted zero-forcing equalization, where the transmit antennae are divided into two group. The first group is encoded by a lower rate code and multidimensional search algorithm is used for demodulation and decoding, while the second group is encoded by higher rate code and weighted zero-forcing equalization is used. Once the first group is decoded successfully, they are cancelled out from the received vector for the decoding of the second group. The complexity and the error rate performance are investigated and compared with a well-known sphere decoding algorithm.

Development of 3.6 Gbps RF Transceiver for Wireless Nomadic Local Area Networks

We present high data rate wideband transceiver design and experimental evaluation for 3.62 Gbps wireless transmission systems in this paper. The present system provides high definition moving picture and contents in a real-time wireless environment at home, offices or class rooms of universities. Also, the present platform provides a test platform for the Giga level high throughput wireless communication system using the OFDM method and the multiple antennas.