Mir M. Mirsalehi

Logical minimization of multilevel coded functions

Discrete numerical values in digital processing systems may be encoded in two-level (binary) or higher-level (multilevel) representations. Multilevel coding can produce smaller and more efficient processors. In truth-table lookup processing, the number of entries (reference patterns) can be reduced using multilevel coding. Since parallel-input/parallel-output optical truth-table lookup processors can be constructed based on holographic content-addressable memories, it is essential to know the minimum storage required to implement various functions. A new simple method for reducing multivalued functions is presented. This method is based on an extension of the Quine-McCluskey minimization method used for binary logic functions. This minimization method is then applied to the truth tables representing (1) modified signed-digit addition, (2) residue addition, and (3) residue multiplication. A programmable logic array gate configuration for the modified signed-digit adder is presented.

Truth-table look-up parallel data processing using an optical content-addressable memory

The extension of truth-table look-up processing beyond primitive operations (such as addition) to higher-level operations (such as discrete matched filtering) is presented. Use of the residue system and logical minimization techniques to reduce the required number of reference patterns stored in a content-addressable memory is illustrated for 16-bit full-precision addition. Multilevel coding of the numbers is introduced as a method to achieve further truth-table reduction. The required number of reference patterns for implementing the residue addition and multiplication operations are provided for all moduli from 2 through 32 with 2-, 3-, and 5-level coding. An optical holographic implementation of a system that processes multilevel coded numbers is presented.

Optical Digital Truth Table Look-Up Processing

The increasing need for large-scale computations has led to new interest in optical parallel computing. Digital parallel processing can be implemented using optical truth table look-up techniques. With optical-logic-based pattern recognition, a content-addressable memory can be constructed. The use of the EXCLUSIVE OR and NAND logic operations to achieve content addressability is discussed. This memory system can be used to perform digital truth table look-up processing. Operations such as addition and multiplication of 4-, 8-, 12-, and 16-bit words in parallel arrays are then directly possible. The number of reference patterns that must be stored is dramatically reduced by the use of the (binary-coded) residue number system and logical reduction tech-niques. An example 16-bit multiple-word-parallel (of order 1000) fixed-point multiplier is discussed.

EXCLUSIVE OR processing (binary image subtraction) using thick Fourier holograms

Theoretical and experimental results are presented for parallel EXCLUSIVE OR processing using thick Fourier holograms. The data pages used contained 1024 bits in a 32 × 32 format. A holographically stored data page is reconstructed together with an input data page that is imaged through the system. The amplitudes of the two wave fronts are adjusted to be equal, and their relative phase is adjusted to be 180°, thus producing the bit-by-bit EXCLUSIVE OR operation between the pages. Using an expanded reference beam for the geometrical configuration treated, it is calculated that the average dynamic range between a 0 and a 1 in the output power would be 17.4 dB. Experimentally, it is shown that excellent EXCLUSIVE OR results are obtainable. Photographs of these results are presented. An average dynamic range of 7.7 dB was measured, the decrease from the calculated value being primarily due to noise in the video method of detection used in the measurements. The probabilities of miss and false alarm and the total probability of error were also measured. The use of a small diameter reference beam, necessary in some applications, causes a large mismatch in the shapes of the two wave fronts, thus degrading the EXCLUSIVE OR results. It is shown theoretically and experimentally that using an aperture at the recording material produces partial compensation of the wave fronts, thus improving the EXCLUSIVE OR results.

Residue arithmetic processing utilizing optical Fredkin gate arrays

A cascadable residue arithmetic processor based on optical Fredkin gate arrays and page-oriented holographic memories is introduced. The implementations of residue functions and operations by this processor are described. Analytic expressions are derived for the number of holograms and waveguide channels required for the implementation of residue addition and multiplication. The practical cases of 16-bit addition and multiplication are analyzed as specific examples. It is shown that, using the proposed architecture, these operations can be implemented with state-of-the-art technologies in holography and integrated optics.

Residue number system holographic truth-table look-up processing: detector threshold setting and probability of error due to amplitude and phase variations

The use of a holographic content-addressable memory system for parallel truth-table look-up digital data processing is analyzed. For binary-coded residue numbers, the operations of 4-, 8-, 12-, and 16-bit addition and multiplication are treated. The minimum probability of error that can be achieved and the corresponding detector threshold settings are determined in each case allowing for the effects of Gaussian distributions in the amplitude and the phase in the recording beams. Resultant probabilities of error for practical conditions are found to be very competitive with those from state-of-the-art nonparallel technologies.

Number representation effects in truth-table look-up processing: 8-bit addition example

The parallelism and interconnectivity of optical systems may provide important advantages for these systems in massively parallel processing applications. Electronic systems, however, retain all the advantages of a highly developed technology that has been widely applied with excellent success. In both of these technologies, the methods of direct truth-table look-up processing are becoming increasingly important as the need grows for increased speed and throughput. A major issue in truth-table look-up processing is the number representation used for data. In this paper, the effects of number representation are investigated for the important case of 8-bit addition as a specific example. The inputs are two 8-bit binary numbers together with an input carry. The output is a full precision 9-bit binary sum. For the intermediate processing three number representations are treated: binary, residue, and modified signed-digit. The numbers in all three representations are in binary-coded form throughout the processing. The critically important steps of encoding the numbers into the residue and modified signed-digit systems and then decoding the results back into direct binary are also performed using truth-table look-up methods. For the direct binary representation, a total of 2545 gates (2519 holograms) are required. For the residue representation, a total of 1764 gates (1686 holograms) are required. For the modified signed-digit representation, a total of 4142 gates (4052 holograms) are required.

Three-dimensional optical Fredkin gate arrays applied to residue arithmetic

A recently proposed 3-D architecture for optical interconnection networks is further analyzed and used in the implementation of residue arithmetic operations. It is demonstrated that, for the processing of large numbers, the new architecture is superior to the 2-D models.

Improved Architectures For Massive Holographic Interconnection Network

Practical difficulties to be encountered in the implementation of massive optical interconnects are outlined and some improved architectures are proposed. The long term optimum design uses currently unavailable large arrays of laser diodes. An interim solution using available spatial light modulators is shown to allow roughly 1011 interconnections per second.

Analytic expressions for the sizes of logically minimized truth tables for binary addition and subtraction

Direct implementations of digital functions by truth table look-up techniques are of increasing importance in both optical and electronic processing. A major issue in these techniques is the logical minimization of the Boolean algebraic expressions for the functions being implemented. For most cases of practical interest, these minimizations require extensive computer time. In this paper, analytic expressions are derived that provide complete information about the absolute minimum sum-of-products representations for binary addition, with and without an input carry, and binary subtraction, with and without an input borrow. These expressions are applicable to any word length.