Mititada Morisue

A novel Josephson adder without carry propagation delay

The authors describe a novel Josephson adder based on the radix-2 signed-digit number representation. In the proposed adder, the addition operation can be carried out in a constant time independent of word length owing to the elimination of the carry propagation chain. A critical path for generating the sum signal can be completed through only three series gates. A carry signal and an intermediate sum signal for all digits in the adder are simultaneously generated in the first step, and the final sum signal is obtained in the second step. Features of the proposed adder are a simple construction, ultra-high speed, and low power consumption. The principle of constructing the adder with an 8 b word length using superconducting quantum interference devices (SQUIDs) is described in detail, and simulation results are presented. Results show that reliable operation can be achieved for the longest delay time of 120 ps for the 8 b adder.<<ETX>>

Neural network for digital applications

A novel technique is described for realizing a high-performance digital circuit using neural networks. As examples of applications of neural networks to digital circuits, an adder and a multiplier using neural networks are proposed. High-speed digital circuits can be realized because the neural networks have almost constant operation time regardless of the number of bits in the circuit. The principle of the adder and multiplier is described in detail, and some simulation results obtained with these circuits are presented.<<ETX>>

Analysis of pulse propagation on high-T/sub c/ superconducting transmission lines

The propagation characteristics of high-T/sub c/ superconducting microstrip transmission lines are calculated from the viewpoint of interconnection technology. A detailed analysis was made to examine the attenuation and phase velocity of a pulse on a YBCO transmission line, taking into consideration of dielectric loss of the MgO substrate. The results of this analysis are compared with the measured propagation constants of YBCO strip line fabricated on a MgO substrate. It is shown that the effect of dielectric loss of a substrate to the attenuation of a microstrip line is dominant and cannot be neglected as long as a MgO substrate is used. How a pulse propagates on the superconducting transmission line and how the circuit parameters of transmission line affect the propagation characteristics of the line were investigated. Simulation results show that the high-T/sub c/ superconducting transmission lines are more promising for interconnections than the conventional transmission lines by virtue of their lower attenuation and less dispersion, even if a dielectric loss of a MgO substrate is taken into consideration.

JCTL: a Josephson complementary ternary logic circuit

A novel complementary ternary logic circuit using Josephson junctions as switching gates is described. The principle of the circuit is based on the tristate of a Josephson junction, that is the state of switching in either positive direction or negative direction, in addition to the state of no switching. The JCTL is constructed of two SQUIDs (superconducting quantum interference devices), one of which is switched in the positive directions and the other in the negative direction. The JCTL can perform the fundamental operations of AND, OR, and NOT in ternary form and can function as a full adder if the voltage-current characteristics of the two SQUIDs are adjusted appropriately. The advantage of the JCTL is its higher speed of operation with higher density than the conventional Josephson binary logic circuit. The principle of operation is described in detail, and simulation results are presented.<<ETX>>

A novel ternary logic circuit using Josephson junction

A novel Josephson complementary ternary logic (JCTL) circuit is described. This fundamental circuit is based on the combination of two SQUIDs (superconducting quantum interference devices), one of which is switched in the positive direction and the other in the negative direction. The JCTL can perform the fundamental operations of AND, OR, NOT, and Double NOT in ternary form. The principle of the operation and design criteria are described in detail. Simulation results show that reliable operation of these circuits can be achieved with a high performance. >

A proposal of Josephson binary-to-ternary converter

This paper presents a novel Josephson converter to perform signal conversion from a binary system to a ternary system. Most converters perform conversion in successive steps from the least significant bit to the most significant bit. Therefore, the circuits become complicated and operation speed becomes low. In order to overcome these shortcomings, a novel converter based on Josephson technology is proposed. The principle of the converter is described in detail and simulation results for an 8-bit converter are illustrated. The advantages of this converter are simple construction with a small number of elements and high speed operation.<<ETX>>

Neural networks for digital adder

A description is presented of a binary adder using the Hopfield type neural network in which false operations due to local minimum equilibria are avoided. Emphasis is placed on the procedure to correct the false operations by introducing stable conditions of a neuron cell. In addition to this binary adder, the Hopfield type adder with a carry-look-ahead circuit is described. Furthermore, the construction of the proposed adder using CMOS inverters is described. The simulation results show that the proposed adder can achieve high performance operation because of an almost constant operation time, regardless of increase in the number of bits in the circuit.<<ETX>>

Fabrication of microstrip transmission line by high-T/sub c/ superconducting materials

High-T/sub c/ ceramic (YBCO) superconduction microstrip transmission lines have been fabricated on MgO and SrTiO/sub 3/ substrates by a sputtering technique and a screen printing method. Sputtering conditions for preparation of microstrip lines are described, and properties of the sputter-deposited films are discussed. The characteristic impedance of the microstrip line was measured by a digitizing oscilloscope to compare it with the specifications. A satisfactory agreement is obtained with theoretical results at both room and low temperatures. In order to investigate the properties of the fabricated microstrip transmission line, the propagation constants, mainly the attenuation and the phase constant, were measured for a sinusoidal wave with the frequencies from 10 MHz to 26.5 GHz, in comparison with those of Al microstrip line fabricated on the MgO substrate. The results show that the attenuation of YBCO transmission line at 4.2 K was about the order of 10/sup -2/ dB/cm, a limit of the experimental equipment, for the frequency up to 10 GHz.

A Josephson ternary associative memory cell

The authors describe a three-valued content-addressable memory cell using a Josephson complementary ternary logic (JCTL) circuit. The memory cell can perform the operations of searching, writing and reading in the ternary logic system. The principle of the memory circuit is illustrated in detail by using the threshold characteristics of the JCTL. Computer simulations were performed to investigate how high-performance operation can be achieved. Simulation results show that the cycle time of memory operation is 120 ps, power consumption is about 0.5 mu W/cell, and tolerances of writing and reading operation are +or-15% and +or-24% respectively. >

A superconducting ternary systolic array processor

A novel Josephson ternary systolic array processor for multiplication is proposed. The processor consists of two kinds of cells, one of which performs a partial multiplication and the other two functions of multiplication and addition simultaneously. The advantages of the processor are its very simple construction with a small number of SQUID gates and its very-high-speed operation and ultralow power dissipation. Information flows between cells in a pipeline fashion so that high performance can be achieved. The principle of the processor is described in detail, and simulation results for the multiplication of 2 trit*2 trit are presented. The results show that the pipeline operation can be executed in a cycle time of 450 ps.<<ETX>>