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Featured researches published by Mitsuru Hiura.


Proceedings of SPIE | 2016

Defectivity and particle reduction for mask life extension, and imprint mask replication for high-volume semiconductor manufacturing

Keiji Emoto; Fumio Sakai; Chiaki Sato; Yukio Takabayashi; Hitoshi Nakano; Tsuneo Takabayashi; Kiyohito Yamamoto; Tadashi Hattori; Mitsuru Hiura; Toshiaki Ando; Yoshio Kawanobe; Hisanobu Azuma; Takehiko Iwanaga; Jin Choi; Ali Aghili; Chris Jones; J. W. Irving; Brian Fletcher; Zhengmao Ye

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash* Imprint Lithography (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. Criteria specific to any lithographic process for the semiconductor industry include overlay, throughput and defectivity. The purpose of this paper is to describe the technology advancements made in the reduction of particle adders in an imprint tool and introduce the new mask replication tool that will enable the fabrication of replica masks with added residual image placement errors suitable for memory devices with half pitches smaller than 15nm. Hard particles on a wafer or mask create the possibility of creating a permanent defect on the mask that can impact device yield and mask life. By using material methods to reduce particle shedding and by introducing an air curtain system, test stand results demonstrate the potential for extending mask life to better than 1000 wafers. Additionally, a new replication tool, the FPA-1100 NR2 is introduced. Mask chuck flatness simulation results were also performed and demonstrate that residual image placement errors can be reduced to as little as 1nm.


Photomask and Next-Generation Lithography Mask Technology VIII | 2001

Mask blanks warpage at 130-nm node

Nobuyoshi Deguchi; Kazunori Iwamoto; Izumi Tsukamoto; Ryo Takai; Mitsuru Hiura

Semiconductor device technology is now making transition from 150 to 130 nm node. Lithography tools for 130 node that employ KrF and ArF as light sources have finished being developed. Also, mask drawing and inspection tools are ready. However, for actual processes, there is an issue to be solved from realistic DOF or overlay accuracy acquisition point of view.


Novel Patterning Technologies 2018 | 2018

Performance of a nanoimprint mask replication system

Jin Choi; Chris E. Jones; Atsushi Kimura; Kohei Imoto; Chiaki Sato; Kiyohito Yamamoto; Hiroshi Inada; Mitsuru Hiura; Takehiko Iwanaga; Ali Aghili; Makoto Mizuno

Nanoimprint lithography manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of widediameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. In this paper, we review the progress and status of the FPA-1100NR2 mask replication system and also discuss the methods used on wafer imprint systems to extend the life of a replica mask. Criteria that are crucial to the success of a replication platform include image placement (IP) accuracy and critical dimension uniformity (CDU). Data is presented on both of these subjects. With respect to image placement, an IP accuracy (after removing correctables) of 0.8nm in X, 1.0nm in Y has been demonstrated. Particle adders were studied by cycling the tool for more than 16000 times and measuring particle adders. Additionally, new methods, including on-tool wafer inspection and in-situ mask cleaning are being studied to further extend the replica mask life.


Novel Patterning Technologies 2018 | 2018

Overlay improvements using a novel high-order distortion correction system for NIL high-volume manufacturing

Mitsuru Hiura; Tatsuya Hayashi; Atsushi Kimura; Yoshio Suzaki

Nanoimprint lithography manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. In this paper, we review the advancements in the wafer imprinting system. To address high volume manufacturing concerns, an FPA-1200NZ2C four-station cluster tool is used in order to meet throughput and cost of ownership requirements (CoO). Throughputs of up to 90 wafers per hour were achieved by applying a multi-field dispense method. Mask like of up to 81 lots, using a contact test mask were demonstrated. The status of the tool overlay is discussed. Application of a High Order Distortion Correction (HODC) system to the existing magnification actuator has enabled correction of high order distortion terms up to K30. A mix and match overlay of 3.4 nm has been demonstrated and a single machine overlay across the wafer was 2.5nm.


Proceedings of SPIE | 2017

Nanoimprint system development for high-volume semiconductor manufacturing the and status of overlay performance

Yukio Takabayashi; Mitsuru Hiura; Hiroshi Morohoshi; Nobuhiro Kodachi; Tatsuya Hayashi; Atsushi Kimura; Takahiro Yoshida; Kazuhiko Mishima; Yoshio Suzaki; Jin Choi

Imprint lithography has been shown to be a promising technique for replication of nano-scale features. Jet and Flash Imprint Lithography* (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. There are many criteria that determine whether a particular technology is ready for wafer manufacturing. Included on the list are overlay, throughput and defectivity. The most demanding devices now require overlay of better than 4nm, 3 sigma. Throughput for an imprint tool is generally targeted at 80 wafers per hour. Defectivity and mask life play a significant role relative to meeting the cost of ownership (CoO) requirements in the production of semiconductor devices. The purpose of this paper is to report the status of throughput and defectivity work and to describe the progress made in addressing overlay for advanced devices. In order to address high order corrections, a high order distortion correction (HODC) system is introduced. The combination of applying magnification actuation to the mask, and temperature correction to the wafer is described in detail and examples are presented for the correction of K7, K11 and K17 distortions as well as distortions on actual device wafers.


Photomask Technology | 2017

Progress in nanoimprint wafer and mask systems for high volume semiconductor manufacturing

Mitsuru Hiura; Tatsuya Hayashi; Atsushi Kimura; Yoshio Suzaki; Kohei Imoto; Jin Choi; Hiroshi Morohoshi

Nanoimprint lithography manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of widediameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. In this paper, we review the advancements in both wafer imprinting and mask replication systems. To address high volume manufacturing concerns, an FPA-1200 NZ2C four station cluster tool is used in order to meet throughput and cost of ownership requirements (CoO). The status of the tool overlay is discussed. Application of a High Order Distortion Correction system to the existing magnification actuator has enabled correction of high order distortion terms up to K20. Because mask replication is required for nanoimprint lithography, improvements to the FPA-1100 NR2 mask replication system are reviewed. Criteria that are crucial to the success of a replication platform include both particle control and image placement (IP) accuracy. Data is presented on both of these subjects. Particle adders were studied over a nine month period. Additionally, with respect to image placement, an IP accuracy (after removing correctables) of 1.0nm in X, 1.1nm in Y has been demonstrated.


Archive | 2003

Exposure apparatus and device fabrication method using the same

Mitsuru Hiura; Toshihiko Tsuji


Archive | 2002

SEMICONDUCTOR EXPOSURE METHOD AND ALIGNER

Koichi Chitoku; Mitsuru Hiura; Hideki Ine; Takahiro Matsumoto; Hiroshi Morohoshi; Hideki Nogawa; 千徳 孝一; 松本 隆宏; 樋浦 充; 稲 秀樹; 諸星 洋; 野川 秀樹


Archive | 2014

IMPRINTING METHOD, IMPRINTING APPARATUS, AND DEVICE MANUFACTURING METHOD

Hiroshi Sato; Mitsuru Hiura


Archive | 2013

Imprint apparatus and method of manufacturing article

Akiyoshi Suzuki; Ken-ichiro Shinoda; Mitsuru Hiura

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