Mohammed S. Sayed

Fabric defect detection algorithm using morphological processing and DCT

Textile industry is one of the major industries in Egypt. Fabric defects severely affect the price of fabrics that represents a major threat to this industry in Egypt. In manual defect detection system, even with highly trained inspectors, small percentage of the defects is detected. A real time automatic defect detection system can increase the detection percentage, hence, reduces the textile fabrication costs. In this paper, we present a new algorithm for fabric defect detection in textile industry. The proposed algorithm uses morphological processing and Discrete Cosine Transform (DCT) to automatically detect fabric defects. The proposed algorithm shows a promising performance and solves several drawbacks associated with the existing algorithms.

On the way to an H.264 HW/SW reference model: a SystemC modeling strategy to integrate selected IP-blocks with the H.264 software reference model

SystemC is a new hardware design concept that enables the designer to perform early functional verification of developed hardware blocks by facilitating their integration with software in a unified platform. It provides hardware-oriented constructs within the context of C++ as a class library implemented in standard C++. In this paper, we propose a strategy that enables us to emulate a model of a full HW/SW H.264 encoder. The latest reference software is modified by allowing selected computationally extensive modules to be optionally executed in emulated hardware. SystemC is used for hardware modeling. The proposed strategy enables us to perform early functional verification and conformance analysis of the IP-blocks at the system level of abstraction.

Low-complexity algorithm for fractional-pixel motion estimation

This paper presents low-complexity algorithm for fractional-pixel motion estimation (FME). The proposed algorithm uses a mathematical model to approximate the matching error at fractional-pixel locations. Hence, no interpolation is required at fractional-pixel locations. The matching error values at integer-pixel locations are used to evaluate the model coefficients. The performance of the proposed algorithm has been compared with other FME algorithms including the full quarter-pixel search (FQPS) algorithm. The performance analysis shows that the proposed algorithm has about 93% less computational complexity than the FQPS algorithm for approximately 0.2 dB drop in the reconstruction PSNR values.

Diagonal-based fast intra-mode decision algorithm for HEVC

Intra-mode decision plays an important role in the new high-efficiency video coding (HEVC) video compression standard. The higher number of intra-modes in HEVC standard increased the computational complexity and encoding time significantly. To reduce the encoding time with as low effect as possible on the coding quality, a new algorithm based on the texture of the block diagonals is proposed. The proposed algorithm is used to reduce the number of calculations observed in the original standard. The results show that the proposed algorithm can show variety of solutions with wide range of encoding time reduction and BD rate increment. The solution with the highest time saving within an acceptable BD rate increment shows 40.85% time saving and 1.75% BD rate increment. With different parameters settings, BD rate increments with as low as 0.78% can be achieved while having 33.38% time saving.

Segmentation of breast cancer lesion in digitized mammogram images

Segmentation or abnormality detection is an essential step in mammographic computer-aided diagnosis (CAD) systems. This paper presents a novel computerized method to automatically detect mass lesions (i.e. detect suspicious locations containing abnormalities inside the breast area) on digitized mammogram images. In particular, we implement an enhanced version of the region growing algorithm for segmentation of mass lesions that can be implemented in a complete CAD system. The proposed algorithm uses region growing technique with a novel automatic threshold estimation method to detect and segment mass lesions. The proposed algorithm detects masses by analyzing a single view of the breast (i. e. Medio-Lateral oblique (MLO) view or Cranio-Caudal (CC) view). The performance of the proposed algorithm was evaluated using two mammogram databases from two different hospitals. The matching percentage of the segmented regions obtained by the proposed algorithm is 83% with respect to the ground truth (i.e. reference determined by an expert radiologist). The proposed algorithm showed promising performance when compared with other commonly used segmentation techniques.

Band-limited histogram equalization for mammograms contrast enhancement

Early detection of breast cancer is the most effective method of reducing mortality. Mammography is at present the best available technique for early detection of breast cancer. The most common breast abnormalities that may indicate breast cancer are masses and calcifications. In mammograms, cancer is not easily detected by the eyes because of the bad imaging quality. To improve the correct diagnosis rate of cancer, image-enhancement techniques are often used to enhance the image and aid the radiologists. In this paper, we introduce a new algorithm for mammograms contrast enhancement. The proposed algorithm performs band-limited histogram equalization (BLHE) for certain intensity band of the mammogram histogram. According to the opinion of radiologist, the proposed algorithm showed promising performance when applied on several mammography images. In addition, the proposed algorithm was combined with a wavelet-based contrast enhancement method to further improve its performance.

Low complexity contrast enhancement algorithm for nighttime visual surveillance

This paper presents a new algorithm for nighttime contrast enhancement. The proposed algorithm modifies the traditional histogram equalization algorithm to maintain the color information of the original nighttime images. The algorithm has a low computational cost that makes it suitable for real-time hardware implementation. In addition, its efficient hardware implementation is detailed on a Xilinx Spartan3A DSP XC3SD3400A device. The targeted resolution is 1920×1080@30fps. The hardware prototype utilizes 6.45% of the slices, 1.59% of the Block RAMs, and 7.14% of the DSP48As available in Spartan3A DSP XC3SD3400A device.

An efficient algorithm for Arabic optical font recognition using scale-invariant detector

This paper proposes a new algorithm for Arabic optical font recognition (AOFR) as the first stage for Arabic optical character recognition. The proposed algorithm uses scale-invariant detector, gradient-based descriptor, and k-means clustering. The scale-invariant detector is used to find key points that identify the font of an image of printed Arabic text. The work in this paper compares between several scale-invariant detectors and selects the best one for AOFR. A gradient-based descriptor similar to the one in the famous scale-invariant feature transform algorithm is used to describe the detected key points. In addition, k-means clustering is used for font classification. In this paper, the mean recognition rate is used to evaluate the performance of the proposed algorithm. The proposed algorithm shows superior performance when compared with recently published algorithms for AOFR.

Video-Active RAM: A processor-in-memory architecture for video coding applications

This paper presents the Video-Active RAM (VA-RAM) architecture for video coding applications. VA-RAM is a processor-in-memory architecture customized for video coding applications. The VA-RAM architecture has been used to implement several video coding algorithms. A prototype of the VA-RAM for block-based integer-pixel ME has been fabricated using the TSMC 0.18 um CMOS technology. The architecture uses 89,687 gates and 18,976 bits of on-chip memory. At a maximum clock frequency of 125 MHz, the fabricated chip is able to process 15 4CIF fps. It consumes 84.68 mW at 125 MHz and has core area of 2.9 mm2.

Scalable Integer DCT Architecture for HEVC Encoder

HEVC (H.265) standard was proposed as a means to increase the compression rate with no loss in video quality. Large integer DCT, with sizes 16x16 and 32x32, is one of the key new features of the H.265 standard. In this paper, we propose a new scalable architecture for integer DCT in HEVC encoder. The proposed architecture is a fully pipelined architecture with optimized adders bit-widths. It was prototyped on TSMC 65 nm CMOS technology. The prototyping results show the high performance of theproposed architecture. Its gate count is 130K and it can achieve throughput of 9.26 Gsps. The proposed architecture can encode 8K @ 120 fps video sequence with working frequency of 373.25 MHz in real time.