Moojin Kim

47.1: Invited Paper: Highly Robust Flexible AMOLED Display on Plastic Substrate with New Structure

A new flexible TFT backplane structure with improved mechanical reliability has been fabricated on a plastic substrate using amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistors. The panel withstood 10,000 bending cycles at a bending radius of 5 mm without any noticeable TFT degradation. After the bending test, change of Vth, mobility, sub-threshold slope, and gate leakage current were only −0.10V, −0.11cm2/V-s, 0.01V/decade, and −1.03×10-−12A, respectively. No line defects, dark spots, or bright spots appeared after 10K bending cycles at a bend radius of 10 mm.

16.2: World-Best Performance LTPS TFTs with Robust Bending Properties on AMOLED Displays

This study reported a low temperature polycrystalline silicon LTPS thin film transistor TFT fabrication process on plastic substrates for flexible display applications. Polycrystalline silicon poly-Si films were formed by excimer laser annealing ELA method. It was found by ELA thermal simulation that there was around 70 □ on plastic surface during ELA crystallization process. The excimer laser irradiated film was analyzed by using various spectroscopic methods such as X-ray diffraction, scanning electron microscopy, and atomic force microscopy. Dehydrogenation and activation processes were performed by a conventional LTPS method without causing any plastic substrate distortion. The fabricated poly-Si TFT on a flexible backplane shows a very good performance with field effect mobility of 95.3 cm2/Vs, on/off ratio current ratio > 108, and threshold voltage of −1.6 V. Bending tests after a delamination process were also performed with TFT backplane samples.

Effects of gate insulator using high pressure annealing on the characteristics of solid phase crystallized polycrystalline silicon thin-film transistors

The oxidizing ambient was built using high pressure H2O vapor at 550 °C. For the solid phase crystallization (SPC) polycrystalline silicon (poly-Si) that is annealed for 1 h at 2 MPa, the oxide thickness is about 150 A. The oxide layer is approximately 90 A above the original surface of the poly-Si and 60 A below the original surface. The oxide layer is used as the first gate insulator layer of thin-film transistors (TFTs). The heating at 550 °C with 2 MPa H2O vapor increased the carrier mobility from 17.6 cm2/V s of the conventional SPC process to 30.4 cm2/V s, and it reduced the absolute value of the threshold voltage (Vth) from 4.13 to 3.62 V. The subthreshold swing also decreased from 0.72 to 0.60 V/decade. This improvement is attributed mainly to the reduction in defect density at the oxide/poly-Si interface and in the poly-Si film by the high pressure annealing (HPA) process. Since the realization of excellent performance at the oxide/poly-Si interface and in poly-Si depends on the defect density, t...

Effects of high pressure annealing on the characteristics of solid phase crystallization poly-Si thin-film transistors

Integrating circuits into organic light emitting diode displays require fabrication of polycrystalline silicon (poly-Si) based thin-film transistors (TFTs) on glass substrates. In this work we evaluated the use of high pressure annealing (HPA) process of poly-Si films in H2O atmosphere to improve TFT characteristics via reducing defect density in poly-Si films. We attempted to develop a HPA process at temperatures below 600°C without causing any glass distortion and reducing the throughput. The HPA-treated poly-Si film was analyzed using various spectroscopic methods such as Raman, x-ray photoelectron spectroscopy, and transmission electron microscope, and the evaluation of the characteristics of TFTs fabricated by such poly-Si films was made. The heating at 550°C with 1MPa H2O vapor increased the carrier mobility from 8.5to20cm2∕Vs and reduced the absolute value of the threshold voltage from 9.6to6.5V, as compared with the conventional solid phase crystallization (SPC) process. The sub-threshold swings a...

Electronic parameters of the two-dimensional electron gas in modulation- doped single quantum wells due to an embedded deep step layer

The Shubnikov–de Haas (S–dH) measurements at 1.5 K clearly demonstrated the existence of a two-dimensional electron gas (2DEG) in the modulation-doped Al0.25Ga0.75As/InyGa1−yAs/GaAs single and step quantum wells, and the fast Fourier transformation results for the S–dH data clearly indicated the electron occupation of one subband in the asymmetric single and step quantum wells. While the electron carrier density of the 2DEG in the step quantum well was larger than that in the single quantum well due to the larger conduction-band discontinuities, the mobility of the 2DEG in the step quantum well was smaller than that in the single quantum well because of the interface scattering resulting from the embedded step well. The electron effective mass in the step quantum well was smaller than that in the single quantum well, which was consistent with a smaller mass of the embedded deep step layer. The electronic subband energy, the energy wave function, and the Fermi energy in the InyGa1−yAs step quantum wells we...

Simple Fabrication of a Three-Dimensional CMOS Inverter Using p-Type Poly-Si and n-Type Amorphous Ga–In–Zn–O Thin-Film Transistors

We have successfully fabricated a novel 3-D vertically stacked complementary metal-oxide-semiconductor hybrid inverter using a lower p-type poly-Si thin-film transistor (TFT) and an upper n-type amorphous Ga-In-Zn-O (a-GIZO) TFT. The device was fabricated step by step, starting from the fabrication of the lower poly-Si TFT via a high-temperature process to the fabrication of the upper a-GIZO TFT via a low-temperature process; this was done to prevent damage to the TFTs and to optimize their characteristics. The entire process was further simplified by the coplane gate structure that allows successive formation of the a-GIZO TFT on the poly-Si TFT. The transfer characteristics show clear inverter actions, indicating high performances of the TFTs.

New Pixel Circuit Design Employing an Additional Pixel Line Insertion in AMOLED Displays Composed by Excimer Laser-Crystallized TFTs

Active matrix organic light-emitting diode (AMOLED) displays are fabricated from polycrystalline silicon, which is formed in the single and double (overlap) scanned area during the excimer laser annealing (ELA) process. A redundant pixel line (RPL) design is proposed to remove the overlapping mura and, as a result, a 5-in AMOLED display is successfully fabricated without any non-uniform line image on the overlapping scanned area. This result indicates that the fabrication of a large-sized AMOLED panel is possible using ELA crystallization through an RPL design.

Effects of Excimer Laser Annealing Process on the Ni-Sputtered Amorphous Silicon Film

This article conducted a comparative analysis on thin film transistors (TFTs) fabricated by using the excimer laser annealed (ELA) polycrystalline silicon (poly-Si) and those fabricated by using the Ni-sputtered ELA poly-Si. The grain size of the Ni-sputtered ELA poly-Si is 3 times greater than that of the ELA poly-Si. The Ni-sputtered ELA poly-Si TFTs showed a higher drain current, lower threshold voltage, smaller subthreshold swing, and higher electron mobility than the ELA poly-Si TFTs. This improvement is attributed mainly to the reduction of the defect density rendered by the large grain size.

P‐21: Investigation of Pattern‐Induced Brightness Non‐Uniformity in AMOLED Displays

We found that pattern-induced line type brightness non-uniformity is related to moire patterns that appear when primary grain boundaries in SLS processed poly-Si are aligned over repetitive TFT patterns such as metal lines. We propose a method to diminish the Moire pattern type non-uniformity by adopting black matrix and top emission TFT structure.

P‐19: Development of Microcrystalline Si for TFT Backplanes

A new composite material based on directly deposited microcrystalline Si (μc-Si) was developed, tested and applied as active layer in top-gate coplanar p-type TFTs. The obtained TFTs characteristics demonstrate high quality of developed μc-Si and possibility of using it in TFT backplanes for AMOLED displays.