Moon-sang Lee

Run-to-run overlay control of steppers in semiconductor manufacturing systems based on history data analysis and neural network modeling

This paper presents a new run-to-run control scheme to reduce overlay misalignment errors in steppers and demonstrates the feasibility of the scheme by real-time experimental tests. The overlay misalignment error mainly depends on two factors: one is the internal dynamics of photo processes and steppers and the other is the process history of lots, such as base equipment and reticles. Based on these observations, a new control scheme was designed to find the stepper inputs minimizing the misalignment errors based on history data analysis and neural network models. Moreover, we demonstrated that the proposed control scheme reduces the spec-out ratios as well as the number of engagements of the send-ahead wafer process, which thereby results in the increase of product yield in semiconductor manufacturing.

A Novel Growth Method of Freestanding GaN Using In situ Removal of Si Substrate in Hydride Vapor Phase Epitaxy

We demonstrate the freestanding GaN of 2 in. diameter and 400 µm thickness grown from Si substrate by hydride vapor phase epitaxy. To prevent the formation of cracks in the GaN layer during cooling, the Si substrate was removed at high temperature, which successfully suppressed the tensile stress evolution in GaN. The freestanding GaN exhibited high quality with FWHM of 65 arcsec in (0002) X-ray rocking curve and etch pit density of less than 1×106/cm2. It may be possible to fabricate high-quality freestanding GaN substrates of over 8 in. diameter using this method.

Thick GaN growth via GaN nanodot formation by HVPE

We demonstrate a 400 μm-thick GaN layer on 4 inch (0001) Al2O3 substrates through GaN nanodot formation as a seed for stress relaxation layers, which were formed by an in situ special surface treatment using HVPE. The size and density of the GaN nanodots determined the thickness of the stress relaxation layers and the structural properties of thick GaN. The 400 μm-thick GaN layer exhibits a smooth surface and high crystal quality with FWHM of 104 arcsec and 163 arcsec in the (002) and (102) X-ray rocking curves, respectively. The dislocation density estimated via micro-PL measurements was 2 × 106 cm−2. This can provide an efficient and simple way to fabricate thick GaN layers on an Al2O3 substrate without ex situ buffer layer formation or additional complicated processes.

An efficient implementation of Virtual Interface Architecture using adaptive transfer mechanism on Myrinet

User-level communication is investigated by many researchers, in order to resolve the performance degradation of cluster systems due to inefficient communication protocols. It removes the kernel intervention from the critical communication path. Intel, Microsoft and Compaq introduced the Virtual Interface Architecture (VIA), a standard for user-level communication. However, the existing VIA implementation shows low performance in transferring small messages, because it uses a single mechanism to transfer messages without regard to their message size. We implement a high performance VIA, KVIA (Kaist VIA). KVIA, based on descriptor and message size, dynamically selects a proper transfer mechanism. This implementation effectively handles not only large messages but also small messages. Thus, it can be better applied to the systems that frequently use small messages (e.g., lock protocols for software distributed shared memory). The performance of KVIA is reported using round-trip latency and one-way bandwidth. Our results show the round-trip latency of 40 micro-seconds and the maximum one-way bandwidth of 950 Mbits per second, which is about 74% of Myrinet links peak bandwidth.

OPTS: increasing branch prediction accuracy under context switch

Abstract Accurate branch prediction is essential for obtaining high performance in pipelined superscalar processors. Though many dynamic branch predictors have been proposed to obtain high prediction accuracy, they cannot perform as expected under context switches. It is observed that context switches, even at fairly large intervals, can seriously degrade the performance of dynamic branch predictors. In this paper we measure the effect of context switch on branch prediction, and present a new scheme which saves and restores branch predictor table when a context switch occurs. This scheme takes advantage of multiple small predictors which preserve branch predictor tables of independent processes. The effectiveness of reducing interprocess interference is evaluated by simulations.

The investigation of stress in freestanding GaN crystals grown from Si substrates by HVPE

We investigate the stress evolution of 400 µm-thick freestanding GaN crystals grown from Si substrates by hydride vapour phase epitaxy (HVPE) and the in situ removal of Si substrates. The stress generated in growing GaN can be tuned by varying the thickness of the MOCVD AlGaN/AlN buffer layers. Micro Raman analysis shows the presence of slight tensile stress in the freestanding GaN crystals and no stress accumulation in HVPE GaN layers during the growth. Additionally, it is demonstrated that the residual tensile stress in HVPE GaN is caused only by elastic stress arising from the crystal quality difference between Ga- and N-face GaN. TEM analysis revealed that the dislocations in freestanding GaN crystals have high inclination angles that are attributed to the stress relaxation of the crystals. We believe that the understanding and characterization on the structural properties of the freestanding GaN crystals will help us to use these crystals for high-performance opto-electronic devices.

Stability and Control Performance Analysis of Double EWMA Controller With Metrology Delay

This paper mainly focuses on establishing the stability conditions of the double exponentially weighted moving average (d-EWMA) controller with metrology delay when the process experiences a general disturbance and analyzing its control performance under some typical types of process disturbance. The necessary and sufficient conditions for stability are established by Routh-Hurwitz criteria. It has been shown that if the process gain mismatch is greater than 4/3, metrology delay will make the feasible region of two weighting factors in the d-EWMA controller decrease, and the larger metrology delay is, the smaller the feasible region is. Moreover, given two weighting factors, it is found that metrology delay will weaken the robustness of the d-EWMA controller. The influence of metrology delay on the asymptotical control performance is evaluated based on asymptotical mean square error (AMSE). Optimal weighting factors and AMSE can be solved based on analytical expression of the AMSE, which is derived by using the Yule-Walker equations to avoid function summing limit operation. Through numerical simulations, it demonstrates that metrology delay may increase the variability of the process output under certain conditions. Finally, the chemical mechanical polishing process in semiconductor manufacturing is used to illustrate the validity of theoretical results.

Adopting system call based address translation into user-level communication

User-level communication alleviates the software overhead of the communication subsystem by allowing applications to access the network interface directly. For that purpose, efficient address translation of virtual address to physical address is critical. In this study, we propose a system call based address translation scheme where every translation is done by the kernel instead of a translation cache on a network interface controller as in the previous cache based address translation. According to our experiments, our scheme achieves up to 4.5 % reduction in application execution time compared to the previous cache based approach

The investigation of in situ removal of Si substrates for freestanding GaN crystals by HVPE

We investigate the etching of a Si substrate in the fabrication process of freestanding GaN crystal grown using a Si by HVPE. Followed by crystal growth, Si etching by vapor HCl at high temperature results in successful fabrication of the freestanding GaN. Due to the complicated vertical gas flows inside the reactor, careful design of the susceptor was implemented. The unintentional formation of SixNy thin layer at the backside of the Si substrate after the epitaxial growth, which can cause the decreased etch rate and non-uniform etching of a Si substrate, was successfully prevented by N2 purging during and after the etching of a Si substrate. We believe that this study will guide us to achieve the growth of freestanding GaN over 8-inch diameters in the efficient and practical way.

Nearly perfect GaN crystal via pit-assisted growth by HVPE

We demonstrated 5 mm-thick bulk gallium nitride (GaN) with nearly perfect crystal quality. To achieve this, intentional etch pit formation by in situ dry HCl etching and ex situ wet etching in H3PO4 solution was employed on freestanding GaN templates followed by regrowth by hydride vapor phase epitaxy (HVPE). This consecutive etching gave rise to a number of large and deep etch pits on the whole surface of the freestanding GaN. We believe that these can reveal the etch pits originating from the dislocations with the edge, and mixed components. Intentionally formed etch pits were partially covered with the fresh regrown bulk GaN layer, being transformed into voids. Dislocations cannot propagate into new GaN layers through the voids, thus resulting in the reduction of dislocation density. 5 mm-thick bulk GaN exhibits a smooth, transparent surface and extremely high crystal quality with full width at half maximum (FWHM) of 21 arcsec in (0002) X-ray rocking curve and etch pit density (EPD) of 3 × 102 per cm2. This method can provide a promising way to fabricate bulk GaN with extremely low dislocation density, suitable for the fabrication of high-performance devices.