Morten Hartmann

Evolved digital circuits and genome complexity

A major issue with evolutionary computation is scalability. In the field of digital circuit design this fact severely limits the size and complexity of the circuits that can be evolved. Developmental approaches are being suggested as a possible remedy to the scalability issue. Earlier theoretical work indicated that a Kitano mapping develops phenotypes with some form of regularity. Applying this result to the field of evolvable hardware implies that to develop a digital circuit with a developmental mapping, such as the Kitano mapping, places a requirement of regularity on the digital circuit. This issue of regularity is investigated herein, as well as possible encoding schemes. The range and distribution of the complexity of evolved circuits and legal genotypes is measured using Lempel-Ziv compression.

Evolving robust digital designs

Robust electronics is a challenge that the evolvable hardware field is addressing. This paper focusses on tolerance of faults where faults may arise through defects in the technology or unforeseen events. By relaxing the digital abstraction we enable evolution to find robust circuit architectures, exploiting non digital signal variations where necessary. Using a flexible technology and environment simulator multipliers and adders are extrinsically evolved in noisy environments where gates may fail. The robustness of these evolved circuits are further tested in various noise and gate failure environments.

The genotypic complexity of evolved fault-tolerant and noise-robust circuits

Noise and component failure is an increasingly difficult problem in modern electronic design. Bio-inspired techniques is one approach that is applied in an effort to solve such issues, motivated by the strong robustness and adaptivity often observed in nature. Circuits investigated herein are designed to be tolerant to faults or robust to noise, using an evolutionary algorithm. A major challenge is to improve the scalability of the approach. Earlier results have indicated that the evolved circuits may be suited for the application of artificial development, an approach to indirect mapping from genotype to phenotype that may improve scalability. Those observations were based on the genotypic complexity of evolved circuits. Herein, we measure the genotypic complexity of circuits evolved for tolerance to faults or noise, in order to uncover how that tolerance affects the complexity of the circuits. The complexity is analysed and discussed with regards to how it relates to the potential benefits to the evolutionary process of introducing an indirect genotype-phenotype mapping such as artificial development.

Adapting a Genotype-phenotype Mapping to Phenotypic Complexity

The marvel of biological development has motivated researchers to apply artificial development in bio-inspired systems. Among the possible features of artificial development that are being investigated is the potential for improving scalability of evolutionary optimization techniques,by applying artificial development as an indirect mapping.Currently, few guidelines exist as to when development is likely to achieve such improvements. We investigate one guideline based on the complexity of the phenotypic objective and propose a grammatical mapping which can adapt to this complexity. Earlier findings on the correlation between the performance of indirect mappings and phenotypic complexity are confirmed in a new context. Adaptation of an indirect mapping to phenotypic complexity is shown to work well given certain conditions.