Mrinal Kumar

On the Power of Homogeneous Depth 4 Arithmetic Circuits

We prove exponential lower bounds on the size of homogeneous depth 4 arithmetic circuits computing an explicit polynomial in VP. Our results hold for the Iterated Matrix Multiplication polynomial - in particular we show that any homogeneous depth 4 circuit computing the (1, 1) entry in the product of n generic matrices of dimension nO(1) must have size nΩ(√n). Our results strengthen previous works in two significant ways. 1) Our lower bounds hold for a polynomial in VP. Prior to our work, Kayal et al [KLSSa] proved an exponential lower bound for homogeneous depth 4 circuits (over fields of characteristic zero) computing a poly in VNP. The best known lower bounds for a depth 4 homogeneous circuit computing a poly in VP was the bound of nΩ(log n) by [KLSSb], [KLSSa]. Our exponential lower bounds also give the first exponential separation between general arithmetic circuits and homogeneous depth 4 arithmetic circuits. In particular they imply that the depth reduction results of Koiran [Koi12] and Tavenas [Tav13] are tight even for reductions to general homogeneous depth 4 circuits (without the restriction of bounded bottom fanin). 2) Our lower bound holds over all fields. The lower bound of [KLSSa] worked only over fields of characteristic zero. Prior to our work, the best lower bound for homogeneous depth 4 circuits over fields of positive characteristic was nΩ(log n) [KLSSb], [KLSSa].

The limits of depth reduction for arithmetic formulas: it's all about the top fan-in

In recent years, a very exciting and promising method for proving lower bounds for arithmetic circuits has been proposed. This method combines the method of depth reduction developed in the works of Agrawal and Vinay[1], Koiran [11] and Tavenas [16], and the use of the shifted partial derivative complexity measure developed in the works of Kayal [9] and Gupta et al [5]. These results inspired a flurry of other beautiful results and strong lower bounds for various classes of arithmetic circuits, in particular a recent work of Kayal et al [10] showing superpolynomial lower bounds for regular arithmetic formulas via an improved depth reduction for these formulas. It was left as an intriguing question if these methods could prove superpolynomial lower bounds for general (homogeneous) arithmetic formulas, and if so this would indeed be a breakthrough in arithmetic circuit complexity. In this paper we study the power and limitations of depth reduction and shifted partial derivatives for arithmetic formulas. We do it via studying the class of depth 4 homogeneous arithmetic circuits. We show: (1) the first superpolynomial lower bounds for the class of homogeneous depth 4 circuits with top fan-in o(log n). The core of our result is to show improved depth reduction for these circuits. This class of circuits has received much attention for the problem of polynomial identity testing. We give the first nontrivial lower bounds for these circuits for any top fan-in ≥ 2. (2) We show that improved depth reduction is not possible when the top fan-in is Ω(log n). In particular this shows that the depth reduction procedure of Koiran and Tavenas [11, 16] cannot be improved even for homogeneous formulas, thus strengthening the results of Fournier et al [3] who showed that depth reduction is tight for circuits, and answering some of the main open questions of [10, 3]. Our results in particular suggest that the method of improved depth reduction and shifted partial derivatives may not be powerful enough to prove superpolynomial lower bounds for (even homogeneous) arithmetic formulas.

Superpolynomial Lower Bounds for General Homogeneous Depth 4 Arithmetic Circuits

In this paper, we prove superpolynomial lower bounds for the class of homogeneous depth 4 arithmetic circuits. We give an explicit polynomial in VNP of degree n in n 2 variables such that any homogeneous depth 4 arithmetic circuit computing it must have size n Ω(loglogn).

Sums of products of polynomials in few variables: lower bounds and polynomial identity testing

We study the complexity of representing polynomials as a sum of products of polynomials in few variables. More precisely, we study representations of the form

Efficient Indexing of Necklaces and Irreducible Polynomials over Finite Fields

P = \sum_{i = 1}^T \prod_{j = 1}^d Q_{ij}

Functional lower bounds for arithmetic circuits and connections to boolean circuit complexity

such that each

Finer Separations Between Shallow Arithmetic Circuits.

Q_{ij}

Arithmetic Circuit Lower Bounds via Maximum-Rank of Partial Derivative Matrices

is an arbitrary polynomial that depends on at most