Mu-Hun Park

Charge Pump Design for TFT-LCD Driver IC Using Stack-MIM Capacitor

A cross-coupled charge pump with internal pumping capacitor, which is advantageous from a point of minimizing TFT-LCD driver IC module, is newly proposed in this paper. By using NMOS and PMOS diodes connected to boosting nodes from VIN nodes, the pumping node is precharged to the same value at the pumping node in starting pumping. Since the first-stage charge pump is designed differently from the other stage pumps, a back current of pumped charge from charge pumping node to input stage is prevented. As a pumping clock driver is located in front of pumping capacitor, the driving capacity is improved by reducing a voltage drop of the pumping clock line from parasitic resistor. Finally, a layout area is decreased more compared with the conventional cross-coupled charge pump by using a stack-MIM capacitor. A proposed charge pump for TFT-LCD driver IC is designed with 0.13μm triple-well DDI process, fabricated, and tested.

Extracting Image Information of the unmanned-crane automation system Using an Integrated Vision System

This paper introduces an Integrated Vision System that enables us to detect the image of slabs and coils and get the complete three dimensional location data without any other obstacles in the field of unmanned-crane automation system. Existing vision system research tends to be easily influenced by the environment of the work place and therefore cannot give the exact location information. To overcome these weaknesses, this paper suggests laser scanners should be combined with a CCD camera named Integrated Vision System. The suggested system is expected to help improve the unmanned-crane automation system.

A Low-Power 512-Bit EEPROM Design for UHF RFID Tag Chips

In this paper, a design for a low-power 512-bit synchronous EEPROM with flash cells for passive UHF RFID tag chip is presented. Applied are low-power schemes such as dual power supply voltage(VDD=1.5V and VDDP=2.5V), clocked inverter sensing, voltage-up converter, IO interface, and Dickson charge pump using schottky diode. An EEPROM is fabricated with the 0.25μm- EEPROM process. Simulation results show that power dissipations are 8.34μW in the read cycle and 57.7μW in the write cycle, respectively. The layout size is 449.3μm × 480.67μm.