Mustak E. Yalcin

True random bit generation from a double-scroll attractor

In this paper, a novel true random bit generator (TRBG) based on a double-scroll attractor is proposed. The double-scroll attractor is obtained from a simple model which is qualitatively similar to Chuas circuit. In order to face the challenge of using the proposed TRBG in cryptography, the proposed TRBG is subjected to statistical tests which are the well-known Federal Information Processing Standards-140-1 and Diehard test suite in the area of cryptography. The proposed TRBG successfully passes all these tests and can be implemented in integrated circuits.

Experimental confirmation of 3- and 5-scroll attractors from a generalized Chua's circuit

In this work we present an experimental confirmation of 3- and 5-scroll attractors from a generalized Chuas circuit. The generalized Chuas circuit introduced by Suykens, Huang, and Chua makes use of a piecewise linear characteristic with multiple breakpoints leading to a more complete family of n-scroll attractors than n-double scroll attractors, with n a natural number.

n-scroll chaotic attractors from a first-order time-delay differential equation.

In this paper, a novel first-order delay differential equation capable of generating n-scroll chaotic attractor is presented. Hopf bifurcation of the introduced n-scroll chaotic system is analytically and numerically determined. The bifurcation diagram and Lyapunov spectrum of the system are calculated and the results show that the system has a chaotic regime in a wider parameter range. Furthermore, period-3 behavior has been observed on the system. Circuit realizations of two-, three-, four-, and five-scroll chaotic attractors are also presented.

INCREASING THE ENTROPY OF A RANDOM NUMBER GENERATOR USING n-SCROLL CHAOTIC ATTRACTORS

The purpose of this paper is to investigate the effect of the number of scrolls on the measure-theoretic entropy of a random bit generator (RBG) based on multiscroll chaotic attractor. The binary output of the proposed RBG is obtained by sampling the output of the generalized nonlinearity of multiscroll chaotic attractor circuit which is in fact a noninvertible function. Our numeric simulations show that the entropy of the proposed random bit generator is increased by increasing the number of scrolls.

Toward CNN chip-specific robustness

The promising potential of cellular neural networks (CNN) has resulted in the development of several template design methods. The CNN universal machine (CNN-UM), a programmable CNN, has made it possible to create image-processing algorithms that run on this platform. However, very large-scale integration implementations of CNN-UMs presented parameter deviations that do not occur on ideal CNN structures. Consequently, new design methods were developed aiming at more robust templates. Although these new templates were indeed more robust, erroneous behavior can still be observed. An alternative for chip-independent robustness is chip-specific optimization, where the template is targeted to an individual chip. This paper describes a solution proposal in this sense to automatically tune templates in order to make the chip react as an ideal CNN structure. The approach uses measurements of actual CNN-UM chips as part of the cost function for a global optimization method to find an optimal template given an initial approximation. Further improvements are achieved by generating chip-specific robust templates by doing a search for the best template among the optimal ones. The tuned templates are therefore customized versions that are expected to be much less sensitive to imperfections on the operation of CNN-UM chips. Results are presented for the binary and grayscale cases, including the case of grayscale output. It is expected that as this technique matures, it will give CNN-UM chips enough reliability to compete with digital systems in terms of robustness in addition to advantages of speed.

A Simple Programmable Autowave Generator Network for Wave Computing Applications

Spatiotemporal-wave-based computing on an active medium, which is known as wave computing paradigm, mimics the way biological systems process information. Recent anatomic and physiological studies and technological developments in very large-scale integration technology have encouraged the engineers to brace up with this new paradigm. In this paper, a simple network model that is essential in order to explore spatiotemporal behavior and to develop new algorithms based on wave computing technique has been presented. The presented network is a 2-D reaction-diffusion cellular neural network consisting of relaxation oscillators. The network can be programmed as an autowave generator and sources of the wave can be placed at any place on the network. The network has the simplest model that exhibits autowaves. Furthermore, the model is suitable for the implementation of a larger network. The propagation of autowaves between the cells whose dynamics is fixed shows that the network can be adapted to already developed wave computing algorithms in literature.

Coupled chaotic simulated annealing processes

In this paper we formulate methods of chaotic simulated annealing within the context of coupled local minimizers. Interpreted within the cellular nonlinear networks context, coupled local minimizers consider local optimization algorithms as cells with local connections between the cells. As a result, information exchange is taking place between the minimizers. Instead of taking local optimization methods as individual cells we explore here the use of chaotic signals as additional driving force as in continuous simulated annealing where deterministic chaos now plays the role of noise. On a number of examples, improved results are obtained by coupled chaotic annealing. In general, the coupling of the minimizers also leads to a variance reduction on the optimal cost function values simulated for many different runs.

An implementation of 2D locally coupled relaxation oscillators on an FPGA for real-time autowave generation

This paper introduces a digital implementation of a new simple programmable autowave generator network on a field programmable gate array (FPGA). The network is a two dimensional reaction-diffusion Cellular Neural Network which consists of relaxation oscillators. The introduced implementation successfully simulates 25,600 neurons in real-time with novel Cellular Neural Processing Network architecture which uses floating-point number format. The implementation allows simulating the network with high numeric resolution and real-time monitoring of the evolution of autowaves. This FPGA implementation of the network provides a suitable platform to explore spatiotemporal behavior and to implement wave computing algorithms.

Watermarking on CNN-UM for image and video authentication

In this paper a new approach to fragile watermarking technique is introduced. This problem is particularly interesting in the field of modern multimedia applications, when image and video authentication are required. The approach exploits the cellular automata suitability to work as pseudorandom pattern generators and extends the related algorithms under the framework of the cellular non-linear networks (CNNs). The result is a novel way to perform watermarking generation in real time, using the presently available CNN-universal chip prototypes. In this paper, both the CNN algorithms for fragile watermarking as well as on-chip experimental results are reported, confirming the suitability of CNNs to successfully act as real-time watermarking generators. The availability of CNN-based visual microprocessors allows to have powerful algorithms to watermark in real time images or videos for efficient smart camera applications. Copyright

A double scroll based true random bit generator

In this paper, a novel true random bit generator (TRBG) based on a double scroll attractor is proposed. The double scroll attractor is obtained from a simple model which is qualitatively similar to Chuas Circuit. In order to face the challenge of using the proposed TRBG in cryptography, the proposed TRBG is subjected to statistical tests which are the well-known FIPS-140-1 and Diehard test suites in the area of cryptography. The proposed TRBG successfully passes all these tests and can be implemented in integrated circuits.