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Dive into the research topics where Vedat Tavsanoglu is active.

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Featured researches published by Vedat Tavsanoglu.


IEEE Transactions on Circuits and Systems | 2015

Architecture of a Fully Pipelined Real-Time Cellular Neural Network Emulator

Nerhun Yildiz; Evren Cesur; Kamer Kayaer; Vedat Tavsanoglu; Murathan Alpay

In this paper, architecture of a Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) is given and the implementation results are discussed. The proposed architecture has a fully pipelined structure, capable of processing full-HD 1080p@60 (1920 × 1080 resolution at 60 Hz frame rate, 124.4 MHz visible pixel rate) video streams, which is implemented on both high-end and low-cost FPGA devices, Altera Stratix IV GX 230, and Cyclone III C 25, respectively. Many features of the architecture are designed to be either pre-synthesis configurable or runtime programmable, which makes the processor extremely flexible, reusable, scalable, and practical.


european conference on circuit theory and design | 2013

Realization of preprocessing blocks of CNN based CASA system on FPGA

O. Levent Savkay; Nerhun Yildiz; Evren Cesur; Mustak E. Yalcin; Vedat Tavsanoglu

In this paper, hardware optimization of the preprocessing part of a computer aided semen analysis (CASA) system is proposed, which is also implemented on an FPGA device as a working prototype. A real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. For future work, the post-processing part of the CASA system is proposed to be implemented on the same FPGA device as software, using either a soft or hard processor core. By the integration of the pre- and post-processing parts, the designed CASA system will be capable of processing full-HD 1080p@60 (1080×1920) video images in real-time.


IEEE Transactions on Circuits and Systems | 1987

The necessary and sufficient conditions for minimum roundoff noise in second-order state-space digital filters and their optimal synthesis

Vedat Tavsanoglu

For second-order state-space digital filters, new expressions for the covariance matrix K and the unit noise matrix W are derived. Using these, the necessary and sufficient conditions for minimum roundoff noise in scaled filters are given in terms of the state parameters. Simple expressions for the second-order modes of the filter and for the attainable lower bound of the unit noise gain are provided. The scaled state realizations having minimum roundoff noise are evaluated for all types of digital filter transfer functions using only their coefficients.


international symposium on circuits and systems | 2016

Construction of the nodal conductance matrix of a planar resistive grid and derivation of the analytical expressions of its eigenvalues and eigenvectors using the Kronecker product and sum

Vedat Tavsanoglu

This paper considers the task of constructing an (M×A+1)-node rectangular planar resistive grid as: first forming two (M×A+1)-node planar sub-grids; one made up of M of (N+1)-node horizontal, and the other of N of (M+1)-node vertical linear resistive grids, then joining their corresponding nodes. By doing so it is sho wn that the nodal conductance matrices GH and GV of the two sub-grids can be expressed as the Kronecker products GH = Im ⊗ Gn, Gv = Gm ⊗ In, and G of the resultant planar grid as the Kronecker sum G = Gn ⊕ Gm, where Gm and Im are, respectively, the nodal conductance matrix of a linear resistive grid and the identity matrix, both of size M. Moreover, since the analytical expression s for the eigenvalues and eigenvectors of Gm — which is a symmetric tridiagonal matrix — are well known, this approach enables the derivation of the analytical expressions of the eigenvalues and eigenvectors of Gh, Gv and G in terms of those of Gm and Gn, thereby drastically simplifying their computation and rendering the use of any matrix-inversion-based method unnecessary in the solution of nodal equations of very large grids.


IEEE Transactions on Circuits and Systems | 2016

Decomposition of the Nodal Conductance Matrix of a Planar Resistive Grid and Derivation of Its Eigenvalues and Eigenvectors Using the Kronecker Product and Sum With Application to CNN Image Filters

Vedat Tavsanoglu

It is shown that an (M × N)-node planar resistive grid can be decomposed into two sub-grids; one made up of M N-node horizontal and the other of N M-node vertical linear resistive grids which corresponds to decomposing its nodal conductance matrix (NCM) into the Kronecker sum of the NCMs of horizontal and vertical linear grids. This enables the analytical expressions of the eigenvalues and eigenvectors of the NCMs of the sub-grids as well as those of the planar resistive grid to be expressed in terms of those of the two linear grids, whose analytical expressions are well known. For a Cellular Neural Network (CNN) Gabor-type filter (GTF) we define generalized nodal conductance matrices (GNCMs) that correspond to the NCMs of the resistive sub-grids, show that each Kronecker decomposition has a counterpart in CNN GTF and prove that each GNCM, its counterpart NCM and the corresponding temporal state matrices are related through unitary diagonal similarity transformations. Consequently, we prove that the eigenvalues of the temporal state matrix of a spatial band-pass CNN GTF are the same as those of its counterpart spatial low-pass CNN image filter, hence their temporal transient behaviors are similar in settling to a forced response.


signal processing and communications applications conference | 2015

Computer assisted sperm analysis system designed on a hybrid CPU + FPGA architecture

Osman Levent Savkay; Vedat Tavsanoglu; Mustak E. Yalcin; Evren Cesur

In this paper a Computer Assisted Semen Analysis (CASA) system designed on a hybrid CPU + FPGA hardware platform is presented. Multiple moving object tracking technique is used for spermatozoa motility analysis and an algorithm consisting of compositely applied various image processing techniques is used for spermatozoa morphology analysis. The parallel processing architecture of FPGAs are utilized for the image and video processing functions that our system use where high speed processing power is required. Various calculations are done on CPU by utilizing developed software. Our system incorporates also an HD digital camera which is mounted on a biological microscope. It has also been foreseen that our system will be a standalone intelligence system and flexibly programmable for different jobs.


international symposium on circuits and systems | 2015

A systematic approach to the time-domain computation of the impulse response and post-initial conditions of causal LTI systems at the origin

Vedat Tavsanoglu

This paper presents a systematic approach to the computation of the impulse response in the time domain at the origin and post-initial conditions of an N th-order causal SISO LTI system differential equation. It is shown that the solution and its N-1 derivatives of such a differential equation with a unit impulse input in the time interval 0- ≤ t ≤ 0+ are singularity functions, each containing one stepwise discontinuity term whose magnitude is one of the N post-initial conditions of the differential equation for t ≥ 0+. The approach presented is envisaged to provide a simplified tool not only for the computation but also for the teaching of the impulse response.


international symposium on circuits and systems | 2014

An analysis of the mortgage account as a discrete-time LTI system

Vedat Tavsanoglu

This paper presents a comprehensive mathematical analysis of the mortgage account with the aim of intentionally setting up a non-physical example for the teaching of discrete-time LTI systems in the courses signals and systems, digital signal processing and system theory.


international symposium on circuits and systems | 2014

Realization of processing blocks of CNN based CASA system on CPU and FPGA

O. Levent Savkay; Evren Cesur; Nerhun Yildiz; Mustak E. Yalcin; Vedat Tavsanoglu

In this paper, hardware optimization of the preprocessing and software implementation of the processing blocks of a computer-aided semen analysis (CASA) system are proposed, which is also implemented on an FPGA and ARM device as a working prototype. The software implementation of the track initialization, track maintenance, data validation and classification blocks of the processing part are implemented on a Zynq7000 ARM Cortex-A9 processor. In the preprocessing part, a real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. The CASA system introduced in this paper is capable of processing full-HD 1080p@60 (1080 × 1920) video images in real-time.


Cellular Nanoscale Networks and their Applications (CNNA), 2014 14th International Workshop on | 2014

Design of a third generation Real-Time Cellular Neural Network emulator

Nerhun Yildiz; Evren Cesur; Vedat Tavsanoglu

In this paper, the features of the next generation Real-Time Cellular Neural Network Processor (RTCNNP-v3) are discussed. The RTCNNP-v2 structure is the only CNN implementation that is reported to be capable of processing full-HD 1080p@60 (1920×1080 resolution at 60 Hz frame rate) video images in real-time, due to its fully-pipelined architecture, however, it has some weaknesses like the inability to divide the processing in spatial domain, record and recall intermediate results to an external memory and has some issues in its internal memory coding. Those shortcomings are to be addressed in the next design of our CNN emulator - RTCNNP-v3, which will increase the range of applications and enable the implementation to match the requirements of the cutting-edge movie production technologies like UHD (4K) and the future FUHD (8K).

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Evren Cesur

University of Westminster

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Nerhun Yildiz

Yıldız Technical University

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Mustak E. Yalcin

Istanbul Technical University

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O. Levent Savkay

Istanbul Technical University

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Dogancan Davutoglu

Istanbul Kültür University

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Nurullah Çalik

Yıldız Technical University

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Oguzhan Yavuz

Yıldız Technical University

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Umut Engin Ayten

Yıldız Technical University

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Nerhun Yildiz

Yıldız Technical University

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