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Dive into the research topics where Myeongwon Lee is active.

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Featured researches published by Myeongwon Lee.


ACS Nano | 2011

Top-Down Fabrication of Fully CMOS-Compatible Silicon Nanowire Arrays and Their Integration into CMOS Inverters on Plastic

Myeongwon Lee; Youngin Jeon; Taeho Moon; Sangsig Kim

A route to the top-down fabrication of highly ordered and aligned silicon nanowire (SiNW) arrays with degenerately doped source/drain regions from a bulk Si wafer is presented. In this approach, freestanding n- and p-SiNWs with an inverted triangular cross section are obtained using conventional photolithography, crystal orientation dependent wet etching, size reduction oxidation, and ion implantation doping. Based on these n- and p-SiNWs transferred onto a plastic substrate, simple SiNW-based complementary metal-oxide-semiconductor (CMOS) inverters are constructed for the possible applications of these SiNW arrays in integrated circuits on plastic. The static voltage transfer characteristic of the SiNW-based CMOS inverter exhibits a voltage gain of ∼9 V/V and a transition of 0.32 V at an operating voltage of 1.5 V with a full output voltage swing between 0 V and V(DD), and its mechnical bendability indicates good fatigue properties for potential applications of flexible electronics. This novel top-down approach is fully compatible with the current state-of-the-art Si-based CMOS technologies and, therefore, offers greater flexibility in device design for both high-performance and low-power functionality.


Small | 2009

Enhancement-mode silicon nanowire field-effect transistors on plastic substrates.

Eun Ae Chung; Jamin Koo; Myeongwon Lee; Dong Young Jeong; Sangsig Kim

Semiconductor nanowires (NWs) have unique physical properties due to their 1D structure, which enables the more efficient transport of electrical carriers. Si NW transistors especially have attracted tremendous attention, since their interesting device performance can be utilized for integrated nanoscale electronics. These characteristics are also believed to make them useful nanoscale building blocks for electronic devices on plastic substrates that can be fabricated on a relatively large scale. To realize reliable devices with nanoscale dimensions, an assembly process with controlled orientation and density, control of the doping, and suitable contact properties of the Si NWs is required. Recent studies indicate that conventional approaches to the bottom-up fabrication of Si NWs in nanoelectronics inevitably require complicated assembly procedures including the establishment of the accurate control of the doping level and the formation of reliable metal contacts. For these reasons, most of the previous studies dealing with the bottom-up fabrication of field-effect transistors (FETs) based on Si NWs, which were grown by a deposition technique based on the vapor–liquid–solid (VLS) growth mechanism, mainly focused on homogenously doped NW devices operating mostly in accumulation or depletion mode. In the case of normally on NW FETs, the power consumption of the devices is relatively large and the flow of electric charge does not seem to be accurately modulated by the gate structure. Most recently, an n-type/intrinsic/n-type metal oxide semiconductor


Nanotechnology | 2009

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

Myeongwon Lee; Jamin Koo; Eun Ae Chung; Dong Young Jeong; Yong Seo Koo; Sangsig Kim

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.


IEEE Transactions on Electron Devices | 2012

Flexible Nano-Floating-Gate Memory With Channels of Enhancement-Mode Si Nanowires

Youngin Jeon; Myeongwon Lee; Taeho Moon; Sangsig Kim

The electrical characteristics of a flexible nano-floating-gate memory (NFGM) device with a channel made of an enhancement-mode n+-p-n+ Si nanowire (Si-NW) are investigated in this work. The NFGM based on the enhancement-mode Si-NW field-effect transistor is constructed on a plastic substrate with a Pt-nanocrystal floating-gate layer; it exhibits an on-current/off-current ratio of ~107 and a subthreshold swing of 88 mV/dec. The NFGM shows good memory characteristics and mechanical flexibility, such as a threshold voltage shift of 1.85 V, a retention time of up to ~104s, and a stability for up to 1000 bending cycles. The present study demonstrates the promising potential of flexible Si-NW-based nonvolatile memories for future electronics.


IEEE Transactions on Nanotechnology | 2012

Floating Body Effect in Partially Depleted Silicon Nanowire Transistors and Potential Capacitor-Less One-Transistor DRAM Applications

Myeongwon Lee; Taeho Moon; Sangsig Kim

We present a capacitor-less 1T-DRAM cell on SiO2 /Si substrates using a silicon nanowire (SiNW) as the channel material. The SiNWs are fabricated by a top-down route that is fully compatible with the current Si-based CMOS technology. Based on the observation of the floating body effect of a partially depleted (PD) silicon nanowire transistor (SNWT), its 1T-DRAM functionality and reliability characteristics are investigated. By virtue of the top-down route providing a printable form of the inverted triangular SiNWs, the PD SNWT 1T-DRAM cell can be applied on insulating plastic substrates for potential applications of flexible electronics.


Japanese Journal of Applied Physics | 2011

Strain-Dependent Characteristics of Triangular Silicon Nanowire-Based Field-Effect Transistors on Flexible Plastics

Jamin Koo; Youngin Jeon; Myeongwon Lee; Sangsig Kim

Top-gate field-effect transistors (FETs) based on triangular silicon nanowires (SiNWs) obtained from a silicon bulk wafer using a conventional silicon manufacturing technology are constructed on flexible plastic substrates. Their field-effect mobility and peak transconductance are enhanced by 10% in the upwardly bent state and by 29% in the downwardly bent state at a strain of 1.02%, compared with the flat state. The strain effect resulting from the bending of the flexible substrates is higher in the downward state than in the upward state, and the increase in strain improves the performance of SiNW-based FETs. Moreover, their device performance is stable even after bending the substrate several thousand times.


Journal of Applied Physics | 2015

Flexible semi-around gate silicon nanowire tunnel transistors with a sub-kT/q switch

Myeongwon Lee; Youngin Jeon; Min-Suk Kim; Sangsig Kim

Tunnel field-effect transistors (TFETs) with a subthreshold swing (SS) < 60 mV/dec are expected to be active devices in low-power flexible systems, potentially lowering operational voltage by virtue of steep switching behavior via band-to-band tunneling. In silicon (Si) channel materials, however, it still remains a challenge to obtain SS smaller than 60 mV/dec. In this study, we experimentally demonstrate the sub-60 mV/dec operation of a flexible semi-around gate TFET on a plastic substrate using Si nanowires (SiNWs) as the channel material. With the combined advantages of selectively thinned SiNW channels (width ∼ 15 nm and height ∼ 40 nm) and high-κ (Al2O3 ∼ 7 nm) gate dielectric, in conjunction with an abrupt degenerate source junction, the device with a channel length of ∼500 nm exhibits a minimal SS of ∼42 mV/dec at room temperature. Moreover, mechanical bendability of the device indicates that it has stable and good fatigue properties, providing an important step towards the realization of steep-slope switches for low-power and energy-efficient flexible electronics.


Nanotechnology | 2011

Flexible logic gates composed of high performance GaAs-nanowire-based MESFETs with MHz-dynamic operations

Changjoon Yoon; Taeho Moon; Myeongwon Lee; Gyoujin Cho; Sangsig Kim

High performance NOT, NAND and NOR logic gates composed of GaAs-nanowire (NW)-based metal-semiconductor field-effect transistors (MESFETs) were constructed on flexible plastics through a noble top-down route. The representative GaAs-NW-based MESFETs exhibited superior electrical characteristics such as a high mobility (∼3300 cm(2) V(-) s(-1)), large I(on)/I(off) ratio (∼10(8)) and small subthreshold swing (∼70 mV/dec). The NOT, NAND and NOR logic gates showed a maximum voltage gain of 108 and logic swings of 97-99%. All of the logic gates successfully retained their electrical characteristics during 2000 bending cycles. Furthermore, the logic gates were well operated by square-wave signals of up to 100 MHz under various strain conditions. The high performances demonstrated in this study open the way to the realization of high speed flexible logic devices.


Semiconductor Science and Technology | 2010

Type conversion of n-type silicon nanowires to p-type by diffusion of gold ions

Jamin Koo; Myeongwon Lee; Jeongmin Kang; Changjoon Yoon; Kwangeun Kim; Youngin Jeon; Sangsig Kim

The simple type conversion of n-type silicon nanowires (SiNWs) to p-type by the diffusion of Au ions is demonstrated in this study. An Au thin film with a thickness of 10 nm was thermally deposited on an n-type SiNW and a rapid thermal annealing process was performed subsequently to diffuse the Au ions into the SiNW. The electrical characteristics of a back-gate field-effect transistor with a channel composed of the Au-diffused SiNW show that the Au-diffused SiNW acts as a p-type one. The type conversion phenomenon of the SiNW caused by the diffusion of Au ions is discussed in detail in this paper.


Japanese Journal of Applied Physics | 2010

Ultraviolet Electroluminescence Emission from n-Type ZnO/p-Type Si Crossed Nanowire Light-Emitting Diodes

Kwangeun Kim; Jeongmin Kang; Myeongwon Lee; Changjoon Yoon; Kyoungah Cho; Sangsig Kim

The optical characteristics of an n-type ZnO/p-type Si crossed nanowire (NW) light-emitting diode (LED) were investigated in this study. N-ZnO nanowires (NWs) were synthesized by thermal chemical vapor deposition, and p-Si NWs were fabricated by etching a single crystalline Si wafer. The p–n heterojunction LED formed by the cross of the n-ZnO and p-Si NWs selected from the NWs prepared in this work exhibited the current rectifying behavior with the turn-on voltage of 1.3 V. Our investigation of the photoluminescence spectrum of the as-grown n-ZnO NWs and electroluminescence spectrum of the n-ZnO/p-Si crossed NW LED reveals that both spectra have the same position of peaks at 390 nm. This result indicates that the UV emission from the crossed NW LED is mostly attributed to the band-to-band transition of electrons in the ZnO NW.

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