Myunghan Bae

AlGaN/GaN High Electron Mobility Transistor-Based Biosensor for the Detection of C-Reactive Protein

In this paper, we propose an AlGaN/GaN high electron mobility transistor (HEMT)-based biosensor for the detection of C-reactive protein (CRP) using a null-balancing circuit. A null-balancing circuit was used to measure the output voltage of the sensor directly. The output voltage of the proposed biosensor was varied by antigen-antibody interactions on the gate surface due to CRP charges. The AlGaN/GaN HFET-based biosensor with null-balancing circuit applied shows that CRP can be detected in a wide range of concentrations, varying from 10 ng/mL to 1000 ng/mL. X-ray photoelectron spectroscopy was carried out to verify the immobilization of self-assembled monolayer with Au on the gated region.

A Wide Dynamic Range CMOS Image Sensor Based on a Pseudo 3-Transistor Active Pixel Sensor Using Feedback Structure

A dynamic range extension technique is proposed based on a 3-transistor active pixel sensor (APS) with gate/body-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector using a feedback structure. The new APS consists of a pseudo 3-transistor APS and an additional gate/body-tied PMOSFET-type photodetector, and to extend the dynamic range, an NMOSFET switch is proposed. An additional detector and an NMOSFET switch are integrated into the APS to provide negative feedback. The proposed APS and pseudo 3-transistor APS were designed and fabricated using a 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) process. Afterwards, their optical responses were measured and characterized. Although the proposed pixel size increased in comparison with the pseudo 3-transistor APS, the proposed pixel had a significantly extended dynamic range of 98 dB compared to a pseudo 3-transistor APS, which had a dynamic range of 28 dB. We present a proposed pixel that can be switched between two operating modes depending on the transfer gate voltage. The proposed pixel can be switched between two operating modes depending on the transfer gate voltage: normal mode and WDR mode. We also present an imaging system using the proposed APS.

Hybrid UV Active Pixel Sensor Implemented Using GaN MSM UV Sensor and Si-Based Circuit

A hybrid active pixel sensor (APS) was implemented for ultraviolet (UV) imagers by combining a metal- semiconductor-metal (MSM)-type GaN UV sensor and a standard Si CMOS APS controller. The photodetector region of the APS circuit was replaced by a GaN MSM UV sensor, and it was connected together on the printed circuit board with standard Si CMOS APS circuit chip. The dark and photoresponsive current densities of the fabricated MSM UV sensor were 2.5 × 10-6 and 1.6 × 10-3 A/cm2, respectively, at 10 V bias. The fabricated hybrid UV APS has clearly distinguishable ON/OFF operation states under dark and 365-nm UV irradiation conditions. The calculated photoresponsivity of the hybrid-type GaN UV APS was as high as 5.1 V/W.

Highly Sensitive Gate/Body-Tied P-Channel Metal Oxide Semiconductor Field Effect Transistor-Type Photodetector with an Overlapping Control Gate

In this paper, a highly sensitive gate/body-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with an overlapping control gate is proposed. The proposed photodetector has an overlapping control gate that makes it possible to control the sensitivity of the proposed photodetector. This sensitivity controllability extends the dynamic range and provides a high sensitivity in a low-light environment. The body of the proposed gate/body-tied PMOSFET-type photodetector is connected to the floating gate, and the control gate is placed on top of the floating gate. The proposed device was fabricated using a 0.35 µm standard complementary metal oxide semiconductor (CMOS) process. The amplified photocurrent of the proposed device was more than 100 times larger than that of a conventional n+/p-sub photodiode with the same area. The area of the proposed photodetector is 3.8×4.4 µm2, which is 24% smaller than that of a conventional gate/body-tied PMOSFET-type photodetector with a transfer gate. Therefore, the proposed photodetector can be suitable for high-sensitivity active pixel sensors (APSs) because of its much higher responsivity than that of a conventional n+/p-sub photodiode.

A Linear-Logarithmic CMOS Image Sensor With Adjustable Dynamic Range

A new pixel structure is proposed for wide dynamic range CMOS image sensors. A pixel based on a three-transistor active pixel sensor has two linear responses and a logarithmic response using additional circuits. The photogate surrounding the n+/p-sub photodiode exists for the second linear response. The logarithmic response is due to the biased MOS cascode. The proposed pixel was designed and fabricated using a 0.35-μm 2-poly 4-metal standard CMOS process. The dynamic range of the pixel is higher than 106 dB. A test chip with a pixel pitch of 10 × 10 μm2 and a 160 × 120 pixel array is evaluated.

Wide dynamic range CMOS active pixel sensor using a stacked-photodiode structure

In this paper, we propose a stacked-photodiode structure to extend the dynamic range of the CMOS active pixel sensor (APS). The proposed APS uses two photodiodes with different sensitivities and two additional MOSFETs in comparison with a conventional 3-transistor APS. Although the size of pixel is slightly larger than that of conventional 3-transistor APS, extension of the dynamic range is much easier than conventional methods by adjusting the reference voltage. The dynamic range of the proposed APS was greater than 103 dB. The designed circuit has been fabricated by using 0.35 μm 2-poly 4-metal standard CMOS technology and its characteristics have been evaluated.

Wide dynamic range and high-sensitivity CMOS active pixel sensor using output voltage feedback structure

This paper presents a novel high-sensitivity and wide dynamic range complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) with an overlapping control gate. The proposed APS has a high-sensitivity gate/bodytied (GBT) photodetector with an overlapping control gate that makes it possible to control the sensitivity of the proposed APS. The floating gate of the GBT photodetector is connected to the n-well and the overlapping control gate is placed on top of the floating gate for varying the sensitivity of the proposed APS. Dynamic range of the proposed APS is significantly increased due to the output voltage feedback structure. Maximum sensitivity of the proposed APS is 50 V/lux•s in the low illumination range and dynamic range is greater than 110 dB. The proposed sensor has been fabricated by using 2-poly 4-metal 0.35 μm standard CMOS process and its characteristics have been evaluated.

Wide dynamic range CMOS active pixel sensor using a feedback structure

In this work, we propose a wide dynamic range CMOS active pixel sensor (APS) using a feedback structure. The proposed APS uses one additional MOSFET in comparison with a conventional 3-transistor APS. Although the size of pixel is slightly larger than that of conventional 3-transistor APS, extension of the dynamic range is much easier than conventional methods by using a feedback structure. The proposed APS has advantages to allow improvements in both the dynamic range and the sensitivity without process modification. The dynamic range of the proposed APS is expected to be greater than 130 dB. The proposed APS is being fabricated by using 0.18 μm standard CMOS technology.

Dual Sampling-Based CMOS Active Pixel Sensor with a Novel Correlated Double Sampling Circuit

In this paper, we propose a 4-transistor active pixel sensor(APS) with a novel correlated double sampling(CDS) circuit for the purpose of extending dynamic range. Dual sampling techniques can overcome low-sensitivity and temporal disparity problems at low illumination. To accomplish this, two images are obtained at the same time using different sensitivities. The novel CDS circuit proposed in this paper contains MOS switches that make it possible for the capacitance of a conventional CDS circuit to function as a charge pump, so that the proposed APS exhibits an extended dynamic range as well as reduced noise. The designed circuit was fabricated by using 0.35 ㎛ 2-poly 4-metal standard CMOS technology and its characteristics have been evaluated.

Optimization of linear-logarithmic CMOS image sensor using a photogate and a cascode MOSFET for reducing pixel response variation

Recently, CMOS image sensors (CISs) have become more and more complex because they require high-performances such as wide dynamic range, low-noise, high-speed operation, high-resolution and so on. First of all, wide dynamic range (WDR) is the first requirement for high-performance CIS. Several techniques have been proposed to improve the dynamic range. Although logarithmic pixel can achieve wide dynamic range, it leads to a poor signal-to-noise ratio due to small output swings. Furthermore, the fixed pattern noise of logarithmic pixel is significantly greater compared with other CISs. In this paper, we propose an optimized linear-logarithmic pixel. Compared to a conventional 3-transistor active pixel sensor structure, the proposed linear-logarithmic pixel is using a photogate and a cascode MOSFET in addition. The photogate which is surrounding a photodiode carries out change of sensitivity in the linear response and thus increases the dynamic range. The logarithmic response is caused by a cascode MOSFET. Although the dynamic range of the pixel has been improved, output curves of each pixel were not uniform. In general, as the number of devices increases in the pixel, pixel response variation is more pronounced. Hence, we optimized the linear-logarithmic pixel structure to minimize the pixel response variation. We applied a hard reset method and an optimized cascode MOSFET to the proposed pixel for reducing pixel response variation. Unlike the conventional reset operation, a hard reset using a p-type MOSFET fixes the voltage of each pixel to the same voltage. This reduces non-uniformity of the response in the linear response. The optimized cascode MOSFET achieves less variation in the logarithmic response. We have verified that the optimized pixel shows more uniform response than the conventional pixel, by both simulation and experiment.