N.C. Cirillo

Realization of n-channel and p-channel high-mobility (Al,GA)As/GaAs heterostructure insulating gate FET's on a planar wafer surface

Self-aligned gate by ion implantation n-channel and p-channel high-mobility (Al,Ga)As/GaAs heterostructure insulated-gate field-effect transistors (HIGFETs) have been fabricated on the same planar wafer surface for the first time. Enhancement-mode n-channel (Al,Ga)As/GaAs HIGFETs have demonstrated extrinsic transconductances of 218 mS/mm at room temperature and 385 mS/mm at 77 K. Enhancement-mode p-channel (Al,Ga)As/GaAs HIGFETs have demonstrated extrinsic transconductances of 28 mS/mm at room temperature and 59 mS/mm at 77 K. There are the highest transconductance values ever reported on a p-channel FET device.

Inverted GaAs/AlGaAs modulation-doped field-effect transistors with extremely high transconductances

Inverted GaAs/AsGaAs MODFETs with transconductances as high as 1810 mS/mm at 77 K and 1180 mS/mm at 300 K are fabricated using a self-aligned process. The devices have the gate-heterojunction interface spacing of only 100 Å, and the observed values of the transconductance are limited primarily by the source series resistance and by the gate current. The MODFET characteristics are interpreted using the charge control velocity saturation model which takes into account the gate current. The obtained results show a great potential of inverted MODFETs for ultrahigh-speed applications.

Complementary heterostructure insulated gate field effect transistors (HIGFETs)

Both n-channel and p-channel high mobility (Al,Ga)As/GaAs heterostructure insulated gate field effect transistors (HIGFETs) have been fabricated for the first time on the same planar wafer surface using MBE and a self-aligned gate by ion implantation process. Enhancement-mode (E-mode) n-channel HIGFETs have demonstrated extrinsic transconductances of 385 mS/mm at 77 K and 218 mS/mm at room temperature. E-mode p-channel HIGFETs have demonstrated extrinsic transconductances of 59 mS/mm at 77 K and 28 mS/mm at room temperature. These are the highest transconductance values ever reported for a p-channel FET device. The hole field effect mobility was deduced from 3-µm gate length p-channel HIGFETs to be 1,300 cm2/Vs and 500 cm2/Vs at 77 K and room temperature, respectively. The HIGFET approach appears to be very promising for the development of a new generation of high speed, low power complementary circuits.

FET Characterization using gated-TLM structure

A new FET characterization structure consisting of parallel ohmic contacts with gates of varying lengths in between is described. The FET source resistance is accurately measured without parameter fitting or iteration. The low-field electron mobility beneath the gate is determined as an effective uniform value and as a function of distance into the channel without iteration. The use of this structure is demonstrated on self-aligned ion-implanted GaAs MESFETs.

Self-aligned modulation-doped (Al,Ga)As/GaAs field-effect transistors

The first modulation-doped (Al,Ga)As/GaAs field-effect transistors (MODFETs) have been fabricated using a self-aligned ion-implantation process. Measured extrinsic transconductances of 190 mS/mm were achieved at 300 K with source resistances of 1 Ω.mm. The highest currents yet reported for such device structures, in excess of 350 mA/mm, were obtained. A value of the maximum two-dimensional electron gas concentration of nearly 1.2 × 1012cm-2was obtained from an analysis of the FET drain current-voltage characteristics using the charge-control model. These results hold promise for the practical fabrication of very high speed integrated circuits based on MODFETs, using a completely planar self-aligned ion-implantation process.

High-performance self-aligned gate AlGaAs/GaAs MODFET voltage comparator

A very high-performance voltage comparator circuit has been demonstrated using self-aligned gate AlGaAs/GaAs modulation-doped FETs (MODFETs)and laser-trimmable CrSi-based thin-film resistors. The MODFET master/slave comparator circuits demonstrated analog input resolutions of < 1 and 2.5 mV at sampling rates of 0.5 and 1 GHz, respectively, at Nyquist analog input rates at room temperature. The MODFET comparators operated to sampling rates greater than 2.5 GHz at Nyquist analog input rates. Static hysteresis of less than 1 mV was observed for some comparators at room temperature. The self-aligned gate MODFETs demonstrated average threshold-voltage offsets for closely spaced FET pairs of 2.53 ± 1.15 mV, and typical static hysteresis levels of < 1 to 3 mV. These MODFET comparators demonstrated the highest analog input resolution at gigahertz sampling frequencies ever reported, including comparators fabricated using AlGaAs/GaAs heterojunction bipolar transistors (HBTs).

A self-aligned gate superlattice (Al,GA)As/n + -GaAs MODFET 5 &#215; 5-bit parallel multiplier

A 5 × 5-bit parallel multiplier circuit has been demonstrated with self-aligned gate superlattice (Al,Ga)As/n+-GaAs modulation-doped FETs (MODFETs). Multiplication times (gate delays) and corresponding power dissipations of 1.80 ns (73 ps/gate) at 0.43 mW/gate and 1.08 ns (43 ps/gate) at 0.75 mW/gate were measured at room temperature and 77 K, respectively. These are the shortest gate propagation delays ever reported for parallel multiplier circuits at room temperature or 77 K using any semiconductor IC technology.

Quantum well p-channel AlGaAs/InGaAs/GaAs devices for complementary heterostructure FET applications

The low extrinsic transconductance of the p-channel self-aligned gate heterostructure insulated gate FETs (HIGFETs), resulting from low hole mobility and high source resistance, has limited the performance of these devices. Results are presented for such devices fabricated on an AlGaAs/InGaAs/GaAs strained quantum-well structure. Transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, were achieved in 0.8- mu m devices at room temperature. At 77 K 181 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively, were obtained in 1- mu m devices. The highest hole field effect mobilities deduced from the device data are 860 and 2815 cm/sup 2//V at room temperature and 77 K, respectively. These device parameters are believed to be the best reported to date, suggesting that a viable complementary heterostructure FET technology based on this structure can be realized. >

IVA-5 ion implanted GaAs p-channel MESFET with Schottky-barrier height enhancement

electron mobility with a conventional FET structure. More extensive studies were carried out by Look recently 121. Based on the magnetoresistance effect in the short channel, the transconductance (g,) of the device has an inverse square dependence on an external magnetic field perpendicular to the direction of the current flow. The local mobility of the channel just below the depletion region at the gate bias that g,(B) is being measured can be deduced. Mobility profile obtained by this method with small-periphery FET’s are in the Hall mobility range measured in the wafer material. Parasitic resistance effects in these small devices are insignificant and similar results were reported by Jay and Wallis, and Look. However, the degradation of the measured g, by parasitic resistances is considerable in large-periphery (gatewidth > 600 pm) devices, particularly at low gate bias when the channel resistance and parasitics have comparable magnitudes. The mobility values deduced are much lower than those measured in small devices. In this paper, a method of applying parasitic corrections with the magnetotransconductance technique is reported. Accurate determination of the magnetic field dependence of the parasitic resistances was found to be the most crucial procedure. The corrected mobility values have comparable magnitudes to those measured in small devices. Techniques of these accurate measurements will be discussed. Power devices up to 3.5 mm in gate periphery have been studied and corrected mobilities in the range of 3.5-6 X lo3 cm2/V * s was obtained. Measurements were also made at liquid-nitrogen temperature. Some devices show a drastic increase in mobility values up in the 7-10 X lo3 cm2/V . s range and other devices do not exhibit as drastic changes. Attempts are being made to correlate these results with other device parameters and RF performance of the devices.

IIA-5 light and thermal sensitivity studies on three novel AlGaAs/GaAs 2 DEG structures: HIGFET, pulsed-doped MODFET, and superlattice MODFET

IIA-4 A Study of p-Channel AlGaAdGaAs MIS-Like Heterostructure FET’s-Kunishige Oe, Makoto Hirano, and Fumihiko Yanagawa, NTT Electrical Communications Laboratories, 3-1, Morinosato Wakamiya, Atsugi-shi, Kanagawa, 243-01, Japan. Dependence of device performance of p-channel AlGaAs/GaAs MIS-like heterostructure FET’s (HFET’s) on device parameters is investigated and estimation made on expected device performance based on experimental results. Since the development of p-channel HFET’s employing two-dimensional hole gas (2DHG), a complementary integrated circuit based on i-AlGaAsii-GaAs heterostructure is becoming one of the most promising devices for future use. This is because both nand p-type transistors can be fabricated in the same circuit by a selective ion-implantation process [l], [2]. The complementary integrated circuit using these devices achieved ring oscillation at both 77 and 300 K [3]. As the performance of the complementary circuit is restricted by that of the p-channel element, it is necessary to enhance the transconductance of the p-HFET. The HFET’s with different device parameters were fabricated and investigated to determine their influence on the device performance. Salient points are as follows. 1) The most important parameter in the device is source resistance R,. The device transconductance was doubled in the same wafer through reducing R, to 3 Q * mm by increasing the implanted Be dose and using AuZnNiiTiiAu metal structure. 2) K values increased inversely proportional to the AlGaAs layer thickness, d, until d, = 13 nm when the applied gate voltage is low. 3) Transconductances of the devices decreases when d, becomes less than 20 nm because of gate leak currents. Maximum values of transconductance as high as 50 rnSimm at 300 K and 110 mSimrn at 77 K were obtained at dt = 20 nm. As the present device performance is restricted by the gate leak currents, it is preferable to increase A1 content of i-AIGaAsii-GaAs heterostructure in order to increase valence band discontinuity. 4) Velocity of 2DHG at AlGaAsiGaAs interface increases proportional to electric field up to E = 100 V/cm, and saturates to u, = 1.3 X lo7 cmis at E = 20 kVicm at 77 K. Based on the experimental results mentioned above, the p-channe1 HFET’s are expected to achieve nearly 300 mSimm transconductance at 77 K in 1-pm-long gate devices.