N. Seguin-Moreau

MAROC : Multi-Anode readout chip

MAROC is the readout chip designed for the ATLAS luminometer made of Roman pots. It is used to readout 64 channels multi-anode photomultipliers and supplies 64 trigger outputs and a multiplexed charge output. The second version of this ASIC was received during summer 2006. It has been thoroughly tested at LAL since. This paper presents the results obtained and shows that the performances were found in agreement with the main requirements.

Hadron beam test of a scintillating fibre tracker system for elastic scattering and luminosity measurement in ATLAS

A scintillating fibre tracker is proposed to measure elastic proton scattering at very small angles in the ATLAS experiment at CERN. The tracker will be located in so-called Roman Pot units at a distance of 240 m on each side of the ATLAS interaction point. An initial validation of the design choices was achieved in a beam test at DESY in a relatively low energy electron beam and using slow off-the-shelf electronics. Here we report on the results from a second beam test experiment carried out at CERN, where new detector prototypes were tested in a high energy hadron beam, using the first version of the custom designed front-end electronics. With a spatial resolution of 25 mu m an adequate tracking performance was obtained, under conditions which are similar to the situation at the LHC. In addition, the alignment method using so-called overlap detectors was studied and shown to have the expected precision. (Less)

SPIROC: design and performances of a dedicated very front-end electronics for an ILC Analog Hadronic CALorimeter (AHCAL) prototype with SiPM read-out

For the future e+ e- International Linear Collider (ILC) the ASIC SPIROC (Silicon Photomultiplier Integrated Read-Out Chip) was designed to read out the Analog Hadronic Calorimeter (AHCAL) equipped with Silicon Photomultiplier (SiPM). It is an evolution of the FLC_SiPM chip designed by the OMEGA group in 2005. SPIROC2 [1] was realized in AMS SiGe 0.35 μm technology [2] and developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of read-out channels. This ASIC is a very front-end read-out chip that integrates 36 self triggered channels with variable gain to achieve charge and time measurements. The charge measurement must be performed from 1 up to 2000 photo-electrons (p.e.) corresponding to 160 fC up to 320 pC for SiPM gain 106. The time measurement is performed with a coarse 12-bit counter related to the bunch crossing clock (up to 5 MHz) and a fine time ramp based on this clock (down to 200 ns) to achieve a resolution of 1 ns. An analog memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. The analog memory content (time and charge) is digitized thanks to an internal 12-bit Wilkinson ADC. The data is then stored in a 4kbytes RAM. A complex digital part is necessary to manage all these features and to transfer the data to the DAQ. SPIROC2 is the second generation of the SPIROC ASIC family designed in 2008 by the OMEGA group. A very similar version (SPIROC2c) was submitted in February 2012 to improve the noise performance and also to integrate a new TDC (Time to Digital Converter) structure. This paper describes SPIROC2 and SPIROC2c ASICs and illustrates the main characteristics thank to a series of measurements.

HARDROC1, readout chip of the Digital HAdronic CALorimeter of ILC

HARDROC (HAdronic Rpc Detector ReadOut Chip) is the very front end chip designed for the readout of the RPC or Micromegas foreseen for the Digital HAdronic CALorimeter (DHCAL) of the future International Linear Collider. The very fine granularity of the ILC hadronic calorimeters (1cm2 pads) implies a huge number of electronics channels (4 105 /m3) which is a new feature of “imaging” calorimetry. Moreover, for compactness, the chips must be embedded inside the detector making crucial the reduction of the power consumption to 10 µWatt per channel. This is achieved using power pulsing, made possible by the ILC bunch pattern (1 ms of acquisition data for 199 ms of dead time). HARDROC readout is a semi-digital readout with two or three thresholds (2 or 3 bits readout respectively in hardroc1 and hardroc2) which allows both good tracking and coarse energy measurement, and also integrates on chip data storage. The 64 channels of the 2nd prototype, HARDROC2, are made of: • Fast low impedance preamplifier with a variable gain over 8 bits per channel • A variable slow shaper (50-150ns) and Track and Hold to provide a multiplexed analog charge output up to 15pC. • 3 variable gain fast shapers followed by 3 low offset discriminators to autotrig down to 10 fC up to 10pC. The thresholds are loaded by 3 internal 10 bit- DACs and the 3 discri outputs are sent to a 3 inputs to 2 outputs encoder • A 128 deep digital memory to store the 2*64 encoded outputs of the 3 discriminators and bunch crossing identification coded over 24 bits counter. • Power pulsing and integration of a POD (Power On Digital) module for the 5MHz and 40 Mhz clocks management during the readout, to reach 10µW/channel The overall performance of HARDROC will be described with detailed measurements of all the characteristics. Hundreds of chips have indeed been produced and tested before being mounted on printed boards developed for the readout of large scale (1m2) RPC and Micromegas prototypes. These prototypes have been tested with cosmics and also in testbeam at CERN in 2008 and 2009 to evaluate the performance of different kinds of GRPCs and to validate the semi-digital electronics readout system in beam conditions.

MICROROC: MICRO-mesh gaseous structure Read-Out Chip

MICRO MEsh GAseous Structure (MICROMEGAS) and Gas Electron Multipliers (GEM) detectors are two candidates for the active part of a Digital Hadronic CALorimeter (DHCAL) as part of a high energy physics experiment at the International Linear Collider. Physics requirements lead to a highly granular hadronic calorimeter with up to thirty million channels with probably only hit information (digital calorimeter). To validate the concept of digital hadronic calorimetry, a cubic meter technological prototype, made of 40 planes of one squared meter each, is compulsory. Such a technological prototype involves not less than 400 000 electronic channels, thus requiring the development of ASIC. Based on the experience of previous ASICs (DIRAC and HARDROC) and on multiple testbeam results, a new ASIC, called MICROROC (MICRO mesh gaseous structure Read-Out Chip), is currently beeing jointly developped at IN2P3 by OMEGA/LAL and LAPP microelectronics goups. It should be submitted to foundry in june 2010, and prototypes are expected to be delivred at the beginning of september. MICROROC is a 64 channel mixed-signal integrated circuit based on HARDROC manufactured in AMS 350 nm SiGe technology. Analog blocks and the whole digital part are reused from HARDROC, but the very front-end part, ie the preamplifier and shapers, has been especially re-designed for one square meter MICROMEGAS detectors, which require HV sparks robustness for the electronics and also very low noise performance to detect signals down to 2fC with an anode capacitance of. Each channel of the MICROROC chip is made of a fixed gain charge preamplifier, two different adjustable shapers, three comparators and a random access memory used as a digital buffer. Other blocks, like 12-bit DAC, configuration registers, bandgap voltage reference and LVDS receiver are included. All these blocks are power-pulsed, thus reaching a power consumption equal to zero in standby mode. After characterisation of the MPW prototypes, a low volume production will be packaged in TQFP160 with the same pinout as the HARDROC chip. Therefore bulk MICROMEGAS detectors with embedded MICROROC will be straightforward built, using HARDROC previously designed PCBs and the same data acquisition system.

DEVELOPMENT OF A DETECTOR (ALFA) TO MEASURE THE ABSOLUTE LHC LUMINOSITY AT ATLAS

The ATLAS collaboration plans to determine the absolute luminosity of the CERN LHC at Interaction Point 1 by measuring the trajectory of protons elastically scattered at very small angles (μrad). A scintillating fibre tracker system called ALFA (Absolute Luminosity For ATLAS) is proposed for this measurement. Detector modules will be placed above and below the LHC beam axis in roman pot units at a distance of 240 m on cach side of the ATLAS interaction point. They allow the detectors to approach the beam axis to millimeter distance. Overlap detectors also based on the scintillating fibre technology, will measure the precise relative position of the two detector modules, Results obtained during beam tests at DESY and at CERN validate the detectors design and demonstrate the achievable resolution. We also report about radiation hardness studies of the scintillating fibres to estimate the lifetime of the ALFA system at different operating conditions of the LHC. (Less)

Performance of CATIROC: ASIC for smart readout of large photomultiplier arrays

CATIROC (Charge And Time Integrated Read Out Chip) is a complete read-out chip manufactured in AustriaMicroSystem (AMS) SiGe 0.35 μm technology, designed to read arrays of 16 photomultipliers (PMTs). It is an upgraded version of PARISROC2 [1] designed in 2010 in the context of the PMm2 (square meter PhotoMultiplier) project [2]. CATIROC is a SoC (System on Chip) that processes analog signals up to the digitization and sparsification to reduce the cost and cable number. The ASIC is composed of 16 independent channels that work in triggerless mode, auto-triggering on the single photo-electron. It provides a charge measurement up to 400 photoelectrons (70 pC) on two scales of 10 bits and a timing information with an accuracy of 200 ps rms. The ASIC was sent for fabrication in February 2015 and then received in September 2015. It is a good candidate for two Chinese projects (LHAASO and JUNO). The architecture and the measurements will be detailed in the paper.

SPIROC: Design and performance of a dedicated very front-end for an ILC prototype Hadronic Calorimeter with SiPM

The SPIROC chip is a dedicated very front-end electronics to read out a prototype of the Analog Hadronic Calorimeter equipped with Silicon Photomultiplier (SiPM) for ILC (International Linear Collider). A first prototype of SPIROC has been fabricated in 2007 and a second version in 2010. Many test bench and test beam measurements have been performed showing a good overall behavior. However some limitations have been encountered. Another version has been submitted in February 2012 to correct these limitations and to improve the ASIC performances. After an exhaustive description of the ASIC, the performances will be presented in this paper.

The ATLAS LAr calibration board

In order to calibrate the ATLAS Liquid Argon calorimeters to an accuracy better than 1%, over 16 bits dynamic range, 2 prototype boards with 128 pulse generators have been built using DMILL components. The logic of control is able to enable the required channels, to load the DAC value, to delay and send the calibration command. The DAC voltage is distributed to the 128 channels in order to produce the 2 μA – 200 mA precision current. The voltage to current conversion uses a low-offset opamp and a 0.1% 5Ω resistor. Exhaustive measurements have been performed on this prototype (uniformity, linearity, jitters ...) and will be presented in detail.

ALTIROC0, a 20 pico-second time resolution ASIC for the ATLAS High Granularity Timing Detector (HGTD)

ALTIROC0 is an 8-channel ASIC prototype designed to readout 1x1 or 2x2 mm2 50 µm thick Low Gain Avalanche Diodes (LGAD) of the ATLAS High Granularity Timing Detector (HGTD). The targeted combined time resolution of the sensor and the readout electronics is 30 ps for one MIP. Each analog channel of the ASIC must exhibit an extremely low jitter to ensure this challenging time resolution, while keeping a low power consumption of 2 mW/channel. A “Time Over Threshold” and a “Constant Fraction Discriminator” architecture are integrated to correct for the time walk. Test bench measurements performed on the ASIC received in April 2017 are presented.