Naoaki Tsutsui

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating

A chip of embedded SRAM having backup circuits using a 60-nm c-axis aligned crystalline oxide semiconductor (CAAC-OS) such as CAAC indium-gallium-zinc oxide (CAAC-IGZO) and Cortex-M0 core having flip-flops with CAAC-OS backup circuits is fabricated. The SRAM and M0 core can retain data using the backup circuits during power-off; thus, they can perform power gating (PG) with backup time of 100 ns and recovery time of 10 clock cycles (including data restoration time (100 ns)). Further, memory cell area and performance in combining a 45-nm Si SRAM memory cell with 60-nm CAAC-OS are estimated to have negligible overhead.

High-frequency performance of lateral p-n junction photodiodes

We developed an analytical device model for quantum well lateral p-n junction photodiodes (LJPDs). The model takes into account the features of the carrier transport in LJPDs and their geometry, which ensure short transit times and a low capacitance. This model is used for calculating the LJPDs characteristics as functions of the signal frequency, bias voltage, and structural parameters and for the estimation of the LJPD ultimate performance.

Analysis of photon recycling in light emitting diodes with nonuniform injection

We studied the effect of photon recycling in double heterostructure light emitting diodes (LEDs) with relatively small area contact providing nonuniform injection of electrons. A simple phenomenological model of the electron and photon transport in the LED is used to calculate the spatial distributions of electrons and output radiation as well as the external quantum efficiency as functions of device parameters. It is shown that photon recycling is the governing factor of the operation of LEDs with nonuniform injection.

Effect of Photon Recycling in Pixelless Imaging Device

We present an analytical model for the photon recycling effect associated with the reabsorption of generated photons in a light-emitting diode (LED) driven by nonuniform current injected from a quantum well infrared photodetector (QWIP). The model is applied to the evaluation of the modulation transfer function and the external quantum efficiency in pixelless imaging devices based on the integration of a QWIP with a LED. The modulation transfer function and the signal external quantum efficiency of a QWIP-LED pixelless imager are calculated as functions of the structural physical and geometrical parameters. It is shown that photon recycling is a significant factor that limits the spatial resolution of images and increases the external quantum efficiency.

State retention flip flop architectures with different tradeoffs using crystalline indium gallium zinc oxide transistors implemented in a 32-bit normally-off microprocessor

As leakage power continues to increase when transistor sizes are downscaled, it becomes increasingly hard to achieve low power consumption in modern chips. Normally-off processors use state-retention and non-volatile circuits to make power gating more efficient with less static power. In this paper, we propose two novel state-retention flip-flop designs based on a parallel and series retention circuit architectures utilizing crystalline indium gallium zinc oxide transistors, which can achieve state retention with zero static power. To demonstrate the application of these different designs, they are implemented in a 32-bit normally-off microprocessor with an energy break-even time of 1.47 µs for the parallel type design and 0.93 µs for the series type design, at a clock frequency of 15 MHz. We show that decreasing the power supply duty cycle to 0.9%, the average current of the processor core can be decreased by over 99% using either type of flip-flop.

Embedded SRAM and Cortex-M0 Core with Backup Circuits using a 60-nm Crystalline Oxide Semiconductor for Power Gating

Using data retention circuits that include crystalline oxide semiconductor transistors as backup circuits for power gating, a processor system can reduce standby leakage current significantly. This is effective in the Internet of Things (IoT) applications that require standby power reduction. The crystalline oxide semiconductor transistor can constitute a nonvolatile data retention circuit easily because it exhibits significantly lower off-state current than a silicon transistor and is highly compatible with a CMOS logic circuit. The backup circuit can achieve 2-clock-cycle data backup and 4-clock-cycle data restore; thus, the processor system can efficiently perform temporally fine-grained power gating and can achieve longer standby times. Furthermore, area overheads due to the backup circuits are kept very small because the crystalline oxide semiconductor transistors are stacked on silicon transistors.

Influence of photon recycling on the performance of light emitting diodes with nonuniform injection

Summary form only given. Photon recycling associated with the reabsorption of trapped photons strongly affects the performance of light emitting diodes (LEDs). It significantly enhances the LED external quantum efficiency. We use a phenomenological model of the electron and photon transport to calculate characteristics of LEDs with nonuniform injection taking into account the effect of photon recycling. We consider double heterostructure LEDs with a narrow-gap p-doped active region clad between two wide-gap confining layers. The LED structure has a strip top contact injecting electrons and a wide bottom contact injecting holes. Due to the relatively small area of one of the contacts, the electron injection is pronouncedly nonuniform. The bottom of the LED is provided with a mirror.