Neale Dutton

A high speed multifocal multiphoton fluorescence lifetime imaging microscope for live-cell FRET imaging.

We demonstrate diffraction limited multiphoton imaging in a massively parallel, fully addressable time-resolved multi-beam multiphoton microscope capable of producing fluorescence lifetime images with sub-50ps temporal resolution. This imaging platform offers a significant improvement in acquisition speed over single-beam laser scanning FLIM by a factor of 64 without compromising in either the temporal or spatial resolutions of the system. We demonstrate FLIM acquisition at 500 ms with live cells expressing green fluorescent protein. The applicability of the technique to imaging protein-protein interactions in live cells is exemplified by observation of time-dependent FRET between the epidermal growth factor receptor (EGFR) and the adapter protein Grb2 following stimulation with the receptor ligand. Furthermore, ligand-dependent association of HER2-HER3 receptor tyrosine kinases was observed on a similar timescale and involved the internalisation and accumulation or receptor heterodimers within endosomes. These data demonstrate the broad applicability of this novel FLIM technique to the spatio-temporal dynamics of protein-protein interaction.

320×240 oversampled digital single photon counting image sensor

A 320×240 single photon avalanche diode (SPAD) based single photon counting image sensor is implemented in 0.13μm imaging CMOS with state of the art 8μm pixel pitch at 26.8% fill factor. The imager is demonstrated operating as a global shutter (GS) oversampled binary image sensor reading out at 5.14kFPS. Frames are accumulated in real time on FPGA to construct a 256 photon/8bit output image at 20FPS.

A SPAD-Based QVGA Image Sensor for Single-Photon Counting and Quanta Imaging

A CMOS single-photon avalanche diode (SPAD)-based quarter video graphics array image sensor with 8-μm pixel pitch and 26.8% fill factor (FF) is presented. The combination of analog pixel electronics and scalable shared-well SPAD devices facilitates high-resolution, high-FF SPAD imaging arrays exhibiting photon shot-noise-limited statistics. The SPAD has 47 counts/s dark count rate at 1.5 V excess bias (EB), 39.5% photon detection probability (PDP) at 480 nm, and a minimum of 1.1 ns dead time at 1 V EB. Analog single-photon counting imaging is demonstrated with maximum 14.2-mV/SPAD event sensitivity and 0.06e- minimum equivalent read noise. Binary quanta image sensor (QIS) 16-kframes/s real-time oversampling is shown, verifying single-photon QIS theory with 4.6× overexposure latitude and 0.168e- read noise.

11.5 A time-correlated single-photon-counting sensor with 14GS/S histogramming time-to-digital converter

Time-correlated single photon counting (TCSPC) is a photon-efficient technique to record ultra-fast optical waveforms found in numerous applications such as time-of-flight (ToF) range measurement (LIDAR) [1], ToF 3D imaging [2], scanning optical microscopy [3], diffuse optical tomography (DOT) and Raman sensing [4]. Typical instrumentation consists of a pulsed laser source, a discrete detector such as an avalanche photodiode (APD) or photomultiplier tube (PMT), time-to-digital converter (TDC) card and a FPGA or PC to assemble and compute histograms of photon time stamps. Cost and size restrict the number of channels of TCSPC hardware. Having few detection and conversion channels, the technique is limited to processing optical waveforms with low intensity, with less than one returned photon per laser pulse, to avoid pile-up distortion [4]. However, many ultra-fast optical waveforms exhibit high dynamic range in the number of photons emitted per laser pulse. Examples are signals observed at close range in ToF with multiple reflections, diffuse reflected photons in DOT or local variations in fluorescent dye concentration in microscopy. This paper provides a single integrated chip that reduces conventional TCSPC pile-up mechanisms by an order of magnitude through ultra-parallel realizations of both photon detection and time-resolving hardware. A TDC architecture is presented which combines the two step iterated TCSPC process of time-code generation, followed by memory lookup, increment and write, into one parallel direct-to-histogram conversion. The sensor achieves 71.4ps resolution, over 18.85ns dynamic range, with 14GS/s throughput. The sensor can process 1.7Gphoton/s and generate 21k histograms/s (with 4.6μs readout time), each capturing a total of 1.7kphotons in a 1μs exposure.

A SPAD-Based Visible Light Communications Receiver Employing Higher Order Modulation

This paper studies complex modulation schemes, including orthogonal frequency-division multiplexing (OFDM), received by a single photon avalanche diode (SPAD) array integrated circuit (IC). A SPAD operates in the Geiger mode, and is able to detect single photons. This feature enables order of magnitude receiver sensitivity in intensity modulation (IM) / direct detection (DD) Visible Light Communication (VLC) systems. The tradeoff between received power and bit error ratio (BER) using both pulse-amplitude modulation (PAM) and OFDM is shown. A first order model of the noise in a digital SPAD receiver is derived. The noise in the experimental receiver chip approaches the predicted noise in our model, and we achieve receiver sensitivity of

Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors.

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Smart-aggregation imaging for single molecule localisation with SPAD cameras

64 dBm with a 100 kbit/s signal at a BER of 10^-5. It is concluded that future improvements in SPAD VLC receiver architecture will allow sensitivity to approach the quantum limit.

Analysis of Photon Detection Efficiency and Dynamic Range in SPAD-Based Visible Light Receivers

SPAD-based solid state CMOS image sensors utilising analogue integrators have attained deep sub-electron read noise (DSERN) permitting single photon counting (SPC) imaging. A new method is proposed to determine the read noise in DSERN image sensors by evaluating the peak separation and width (PSW) of single photon peaks in a photon counting histogram (PCH). The technique is used to identify and analyse cumulative noise in analogue integrating SPC SPAD-based pixels. The DSERN of our SPAD image sensor is exploited to confirm recent multi-photon threshold quanta image sensor (QIS) theory. Finally, various single and multiple photon spatio-temporal oversampling techniques are reviewed.

Digital Silicon Photomultipliers With OR/XOR Pulse Combining Techniques

Single molecule localisation microscopy (SMLM) has become an essential part of the super-resolution toolbox for probing cellular structure and function. The rapid evolution of these techniques has outstripped detector development and faster, more sensitive cameras are required to further improve localisation certainty. Single-photon avalanche photodiode (SPAD) array cameras offer single-photon sensitivity, very high frame rates and zero readout noise, making them a potentially ideal detector for ultra-fast imaging and SMLM experiments. However, performance traditionally falls behind that of emCCD and sCMOS devices due to lower photon detection efficiency. Here we demonstrate, both experimentally and through simulations, that the sensitivity of a binary SPAD camera in SMLM experiments can be improved significantly by aggregating only frames containing signal, and that this leads to smaller datasets and competitive performance with that of existing detectors. The simulations also indicate that with predicted future advances in SPAD camera technology, SPAD devices will outperform existing scientific cameras when capturing fast temporal dynamics.

4-PAM visible light communications with a XOR-tree digital silicon photomultiplier

We investigate the photon detection efficiency (PDE) and the dynamic range for digital silicon photomultipliers (dSiPMs) over a selection of design parameters: dSiPM unit cell dead time, PDE, unit cell area and fill factor, number of cells, and total dSiPM active area. Two receiver scaling scenarios are considered: varying the number of cells for 1) a fixed unit cell area or 2) a fixed total dSiPM area. Theoretical and simulated results are confirmed with experimental data from a selection of dSiPMs realised on a test chip in 130-nm CMOS process.