Neeraj K. Sharma

Modular design of a large sorting network

Batcher sorting networks have been extensively used in the design of ATM switches based on Batcher-banyan interconnection network. Batcher sorting networks require large number of stages of sorting elements especially for large network sizes. This results in high delay, difficulty in partition into IC, and difficulty in maintaining synchronization across rite entire structure. In this paper, we present a simple design of a sorting network that can be used as a building block to build larger sorting networks of arbitrary size. The proposed design is very modular and can be efficiently implemented using current VLSI technology.

Effect of windowing policies for input buffered ATM switch

In a banyan based broadband packet switch using input queuing, the throughput of the switch is limited by the head of line blocking. Windowing is a technique used to mitigate the head of line blocking by relaxing the strict first-in-first-out queuing discipline of the input buffers. In this paper, we compare four different windowing policies which have been presented in the literature for input buffered non blocking time-slotted packet switch. First we compare the performance in terms of maximum throughput under random and bursty traffic patterns and then compare the implementation requirements of the four windowing policies.

An efficient implementation of bypass queue under bursty traffic

In this paper we present a new bypass queue scheme for an input buffered nonblocking packet switch operating under bursty traffic. The proposed scheme uses first-in-first-out (FIFO) queues and is thus more efficient for implementation as compared to other schemes which use first-in-random-out (FIRO) queues. Maximum throughput comparison of the proposed scheme with the conventional scheme shows significant improvement.

Performance of fault-tolerant sorting network for ATM switching

This paper proposes a self-routing fault-tolerant sorting network that employs an enhanced scheme of the Batcher sorting network. It consists of two Batcher sorting planes with links provided at every stage to allow cell transfer to and from each sorting network, thereby offering multiple paths between each input-output pair and giving a high degree of fault-tolerance and overcoming the single path limitation of the Batcher sorting network. The proposed fault-tolerant sorting network offers high fault-tolerance; low and fixed amount of delay; maintenance of cell sequence; simple routing; and regularity and modularity. Expressions for reliability, mean time to failure, and availability are derived and the numerical results show that the proposed fault-tolerant sorting network has superior performance as compared to Batcher and parallel Batcher sorting networks. Using simulations, we have shown that the proposed fault-tolerant sorting network has a high probability of survival under a faulty environment.

Multicast packet switch based on dilated network

Multicasting is an important feature for any switching network being intended to support broadband integrated services digital networks (B-ISDN). This paper proposes an improved multicast packet switch based on Lees nonblocking copy network (1988). The improved design retains the desirable features of Lees network including its nonblocking property while adopting techniques to overcome the various limitations mentioned in various literature. The proposed network architecture utilizes d-dilated banyan networks to increase the amount of cells that can be replicated within the copy network. Cell splitting is used to optimize the utilization of the networks available bandwidth. Furthermore, the proposed architecture allows for the modular expansion in capacity to accommodate changing traffic patterns. The modular design of the proposed switch likewise offers easy handling and replacement of faulty modules.

Buffer space management using thresholds

Shared memory ATM switches are known to provide optimal throughput-delay performance under unicast traffic. A performance evaluation by computer simulation of a generic shared memory ATM switch is done to study the effect of using thresholds for buffer space management under bursty multicast traffic. The threshold scheme assigns a different priority to unicast and multicast cells depending on whether the memory occupancy is above or below the threshold. The simulations show that the use of proposed threshold scheme results in a better throughput and cell loss rate performance under any traffic load. Cell delay is also lower for output loads under 100%.

Comparison of windowing policies for input buffered packet switch

In a banyan based broadband packet switch using input queuing, the throughput of the switch is limited by the head of line blocking. Windowing is a technique used to mitigate the head of line blocking by relaxing the strict first-in-first-out queuing discipline of the input buffers. We compare four different windowing policies which have been presented in the literature for an input buffered non-blocking time-slotted packet switch. First we compare the performance in terms of maximum throughput under random and bursty traffic patterns and then compare the implementation requirements of the four windowing policies.

Modular design of a large multicast ATM switch

In this paper, we present the design of a large self routing multicast ATM switch. The switch consists of a sorting network followed by a 3-stage routing network. We first present a simple design of a large sorting network, built using a small sized shared memory that can be used as a building block for a large sorting network. The small sized shared memory is also used in the 3-stage routing network making the switch modular and easy to implement using current VLSI technology. As the network uses shared memory modules, multicasting functionality is easily built into the network. The performance of the proposed network is compared with an equivalent completely shared memory switch using computer simulations under bursty traffic model. The results show that the proposed network has better performance in terms of cell loss rate than the completely shared memory switch under moderate to heavy traffic load (0.6/spl les/effective offered load/spl les/1.2). Furthermore, multicast cell delays are drastically improved.

A multicast switching network for B-ISDN

To support broadband integrated services digital networks (B-ISDN), switching networks must have the ability to provide both multipoint connections (multicasting) and point-to-point connections (unicasting). This paper proposes a multicast switching network based on a recently proposed routing network which consists of two banyan networks with links at every stage to allow cell transfer to and from each banyan plane, thereby offering multiple paths between each input-output pair. The proposed multicast network employs the copy and routing networks in a parallel configuration. This approach allows for unicast cells to proceed to the routing network without additional delay and keeps the copy network free of unicast traffic which results in a larger amount of the multicast requests to be successfully replicated. Using simulations, the proposed multicast network was shown to offer better performance than other networks in terms of cell loss rates.<<ETX>>

Fault-tolerant sorting network for ATM switching

The asynchronous transfer mode (ATM) has been accepted as the most promising approach for the broadband integrated services digital network (B-ISDN). This paper proposes a self routing fault-tolerant sorting network that employs an enhanced scheme of the Batcher sorting network. It consists of two Batcher sorting planes with links provided at every stage to allow cell transfer to and from each sorting network, thereby offering multiple paths between each input-output pair and giving a high degree of fault-tolerance and overcoming the single path limitation of the Batcher sorting network. The proposed fault-tolerant sorting network offers high fault-tolerance; low and fixed amount of delay; maintenance of cell sequence; simple routing; and regularity and modularity. Using simulations, we show that the proposed sorting network has a high probability of survival.