Nenad Korolija
University of Belgrade
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Publication
Featured researches published by Nenad Korolija.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2015
Ke Huang; Yu Liu; Nenad Korolija; John M. Carulli; Yiorgos Makris
We introduce two statistical methods for identifying recycled integrated circuits (ICs) through the use of one-class classifiers and degradation curve sensitivity analysis. Both methods rely on statistically learning the parametric behavior of known new devices and using it as a reference point to determine whether a device under authentication has previously been used. The proposed methods are evaluated using actual measurements and simulation data from digital and analog devices, with experimental results confirming their effectiveness in distinguishing between new and aged ICs and their superiority over previously proposed methods.
Journal of Big Data | 2016
Nemanja Trifunovic; Veljko Milutinovic; Nenad Korolija; Georgi Gaydadjiev
This paper describes the vision behind and the mission of the Maxeler Application Gallery (AppGallery.Maxeler.com) project. First, it concentrates on the essence and performance advantages of the Maxeler dataflow approach. Second, it reviews the support technologies that enable the dataflow approach to achieve its maximum. Third, selected examples of the Maxeler Application Gallery are presented; these examples are treated as the final achievement made possible when all the support technologies are put to work together (internal infrastructure of the AppGallery.Maxeler.com is given in a follow-up paper). As last, the possible impact of the Application Gallery is presented and the major conclusions are drawn.
IET Software | 2015
Jovan Popovic; Dragan Bojic; Nenad Korolija
The use case point (UCP) method is one of the most commonly used size estimation methods in software development. Applicability of UCP size for the project effort estimation is thoroughly investigated; however, little attention is devoted to the effort estimation of particular task types. The authors have created and cross-compared prediction models for estimating task-type efforts by means of UCP size using an Online analytical processing model and R packages on a set of 32 real-world projects, with the goal of facilitating analysis of the correlation between project sizes and effort required to complete task types. Requirements, scoping, functional specification, and functional testing task types have up to two times better estimation accuracies than project effort. Implementation has slightly better accuracy than the project effort, while the other task types are not correlated to the UCP size. Using estimates of the most correlated task types and other techniques, such as expert judgment for others, we improved the overall project effort prediction accuracy and decreased the error from 26 to 16%.
Advances in Computers | 2017
Nenad Korolija; Jovan Popovic; Milos Cvetanovic; Miroslav Bojovic
Abstract Compared to control-flow architectures, dataflow architectures usually offer better performances in high performance computing. Moreover, dataflow architectures consume less electrical power. However, only since recently, the technology enables the development of dataflow architectures that are competitive with control-flow architectures. From a programming perspective, there are a relatively small number of experienced dataflow programmers. As a result, there is a need of translating control-flow algorithms into the dataflow environment. This chapter focuses on extracting methods from various fields, which could be applied on translating control-flow algorithms to dataflow environment, comparing available programming tools for dataflow architectures with respect to the previously established methods, and finally, evaluating speedups and reductions in power consumption on a dataflow implementation of the Lattice–Boltzmann method, implemented using a specific tool and method. Results show a remarkable speedup (one to two orders of magnitude), and, at the same time, a considerable reduction in power consumption.
Archive | 2017
Veljko Milutinovic; Jakob Salom; Dragan Veljovic; Nenad Korolija; Dejan Markovic; Luka Petrovic
This chapter analyzes potentials of accelerating applications by transforming them from control flow to dataflow representation and mapping them directly to the hardware based on the FPGA. Firstly, potentials for improvements will be analyzed. Both reduction in execution time and power consumption will be analyzed. Transforming control flow to dataflow applications will be analyzed on a Huxley muscle model implemented using the dataflow approach.
Archive | 2017
Veljko Milutinovic; Jakob Salom; Dragan Veljovic; Nenad Korolija; Dejan Markovic; Luka Petrovic
The reason to include a chapter with this content into this all-around Maxeler book was to show the wide audience, the audience that is still not familiar with dataflow programming paradigm, that there is help and that there is a whole library of tools and applications that can help a programmer in times of need. There are so many detailed source codes and many tools that can either be analyzed and easily changed or used as such, in new applications. Another reason for describing the items in the gallery is to present to the wider audience a good plethora of different cases Maxeler dataflow architecture can be used at. Next to each AppGallery item, there is a short description and applicable use of cases. Not all of the items are described. Some of them are skipped because they are differently and more in depth presented in Trifunovic et al. (J Big Data 3:4, 2016. Available at: https://journalofbigdata.springeropen.com/articles/10.1186/s40537-015-0038-8) and some are omitted because their usage possibilities are too limited.
Archive | 2017
Veljko Milutinovic; Jakob Salom; Dragan Veljovic; Nenad Korolija; Dejan Markovic; Luka Petrovic
One of the main limiting factors in dataflow supercomputing is the discrepancy between the topology of a typical dataflow graph (produced by compiler) and the typical topology of FPGA structure (produced by manufacturer) onto which the execution graph has to be mapped. One possible school of thought is to study cases where infinitesimal changes in hardware domain may generate much more than infinitesimal impact in the benefit domain (speed/complexity/power/risks). The research analyzes the effects of one such infinitesimal add-on in the hardware domain (moving from two-input adders to three-input adders). Different compilation techniques, debugging and optimizing tools and methods, offered by “Maxeler Technologies Ltd.,” are presented and elaborated.
Archive | 2017
Veljko Milutinovic; Jakob Salom; Dragan Veljovic; Nenad Korolija; Dejan Markovic; Luka Petrovic
Nowadays, when technology and science develop fast, the speed of data processing has become very important. Also, with science developing so broadly, there is an increase in the amount of data being processed for solving complex systems in physics, chemistry, biology, astronomy, seismology, meteorology, medicine, etc. For example, in meteorology, which is a science about the Earth’s atmosphere and the changes that happen within it, some of the main occurrences that are being studied are the amount and kind of precipitation, thunderstorms, tornadoes, tropical cyclones, and typhoons; in order to make the weather forecast as precise as possible, it is necessary to collect large amounts of data whose processing is based on solving dynamic equations as functions of time. It is very important to process large scales of information in a short time and give prediction of possible bad weather conditions in order to save people lives and property in a certain area. This chapter deals with resolving this kinds of problems, that is, it describes principle that is used to process large amounts of data in a short period of time. It will be described on an example of calculating values of a polynomial and rational function on the Maxeler architecture. Polynomials are used in engineering for designing roads, buildings, etc. In economy they are used for modeling patterns of economical growth and in medicine for describing bacterial behavior.
Mathematical Problems in Engineering | 2016
Veljko Milutinovic; Borko Furht; Zoran Obradovic; Nenad Korolija
1Department of Computer Engineering and Information Theory, School of Electrical Engineering, University of Belgrade, Bulevar Kralja Aleksandra 73, 11120 Belgrade, Serbia 2NSF I/UCRC CAKE, FAU Site, Department of Computer & Electrical Engineering and Computer Science, College of Engineering and Computer Science, Florida Atlantic University, 777 Glades Road, Boca Raton, FL 33431, USA 3Center for Data Analytics and Biomedical Informatics, Temple University, 1925 N. 12th Street (SERC: 035-02), Philadelphia, PA 19122, USA 4Computer and Information Sciences Department, Temple University, 1925 N. 12th Street (SERC: 035-02), Philadelphia, PA 19122, USA 5Statistics Department, Fox School of Business (Secondary Appointment), Temple University, 1925 N. 12th Street (SERC: 035-02), Philadelphia, PA 19122, USA
telecommunications forum | 2017
Jovan Popovic; Nenad Korolija; Zeljko Markovic; Dragan Bojic