Nguyen Ngoc Mai Khanh

A 0.18-μm CMOS fully integrated antenna pulse transceiver with leakage-cancellation technique for wide-band microwave range sensing radar

This paper presents a leakage cancellation technique for on-chip transceiver for range sensing radar. A 180-nm CMOS transceiver with on-chip antennas is implemented with a 9-11-GHz damping-pulse transmitter (Tx) and a receiver (Rx) including a mixer and a 3-stage low-noise amplifier (LNA). By adding a polarity-reversal switch to the receiver mixer, leakage, reflected signals, and traveling time of transmitted pulses can be measured. Another improvement is the design of the Rxs mixer and the 3-stage wide-band LNA to reduce on-chip DC blocking capacitors. Experimental results with/without reflector placed at several distances from the transceiver are performed to demonstrate the technique. Pulse traveling times are measured with 0.8 ns, 1 ns, and 1.25 ns for the distance of 10 cm, 14 cm, and 18 cm, respectively. Furthermore, reflected signals are measured separately from leakage in cases of different distances.

A circuit for on-chip skew adjustment with jitter and setup time measurement

This paper reports a circuit for on-chip skew adjustment with jitter and setup time measurement. A test chip has been fabricated in a 65-nm CMOS process. It successfully measures the random jitter distribution and the relative setup time. This circuit becomes necessary in SoCs because direct measurement cannot be performed by external equipment. Setup time of a D-FF is measured by sweeping over the range of an adjustable input delay line. Its jitter is represented by a Cumulative Distribution Function which is measured by sampling the setup time repeatedly. The skew can be adjusted based on the setup time and jitter determined by our method. Furthermore, this method can be extended for almost any number of Target/Reference Programmable Delay Lines. This system enables designers to adjust skew between the distributed clock paths as well as to measure sub-picosecond level jitter and setup time of D-FFs beyond 10-GHz.

A fully integrated shock wave transmitter with an on-chip dipole antenna for pulse beam-formability in 0.18-μm CMOS

This paper presents a fully integrated 9–11-GHz shock wave transmitter with an on-chip antenna and a digitally programmable delay circuit (DPDC) for pulse beam-formability in short-range microwave active imaging applications. The resitorless shock wave generator (SWG) produces a 0.4-V peak-to-peak (p-p) shock wave output in HSPICE simulation. The DPDC is designed to adjust delays of shock-wave outputs for the beam-forming purpose. SWGs output is sent to an integrated meandering dipole antenna through an on-chip transformer. The measured return loss, S11, of a stand-alone integrated meandering dipole is from −26 dB to −10 dB with frequency range of 7.5–12 GHz. A 1.1-mV(p-p) shock wave output is received by a 20-dB standard gain horn antenna located at a 38-mm distance from the chip. Frequency response and delay resolution of the measured shock wave output are 9–11-GHz and 3-ps, respectively. These characteristics are suitable for fully integrated pulse beam-forming array antenna system.

Burst-pulse Generator based on transmission line toward sub-MMW

A Transmission-line-based Burst-pulse Generator (TPG) is proposed in this paper. The proposed architecture does not consume power in standby stage, so it is more suitable in a pulse system than a continuous wave generator. Also, the center frequency of the pulse can be higher than the Fmax of a CMOS process, since the pulse oscillation need not be sustained. The architecture is modeled and simulated in a 0.18-µm CMOS process, then the performance is compared with a push-push oscillator, which is a conventional method to generate frequency higher than processs Fmax. It is shown that our TPG has better energy conversion efficiency up to a pulse duty cycle of 10%, and the oscillation frequency above 2Fmax of the process is achieved.

A millimeter-wave resistor-less pulse generator with a new dipole-patch antenna in 65-nm CMOS

This paper presents a millimeter-wave (mm-wave) pulse generator (PG) integrated with a new dipole-patch antenna in a 65-nm CMOS process for short range and portable active imaging applications. The integrated wide-band dipole-patch antenna is a combination of two type of radiators, patch and dipole, to exploit both advantages of two antenna types. The 395-μm×625-μm dipole-patch antenna in the top metal of the 65-nm CMOS process has a wide 30.21 GHz bandwidth from 73.89–104.1 GHz with minimum return loss of −28.95 dB at 101.6 GHz and resistance from 27.28–47.464 Ω by simulated in EMDS, ADS 2009. We proposed a mm-wave damping PG without any resistor. A peak-to-peak pulse output is 1.66-V with 9.13-ps duration in HSPICE simulation at the antenna input terminals. Radiation measurements by using a horn antenna and a Schottky diode placed at a 39-mm distance from the chips surface shows the main beams peak at θ max = 17° with a half-power beam-width (HPBW) of 9° and the second beams peak at θ sec = −23°. Maximum radiated powers in horizontal and vertical planes are respectively 2.436 μW and 0.5 μW.

A CMOS Pulse Beamforming Transmitter Design with an On-Chip Antenna Array for Millimeter Wave Imaging Applications

This paper presents an on-chip folded dipole antenna array with 100-120-GHz pulse transmitter for imaging applications in the millimeter wave (mm-wave) regime. The damping pulse generator is implemented using an on-chip transformer, a capacitor, and an NMOS transistor operated with 100-MHz clock to produce mm-wave pulses which are fed into on-chip antennas. Also, a new CMOS programmable delay circuit controller is developed for pulse beamformability. This array antenna transmitter has been designed and fabricated as a 4.2-mm×4.2-mm chip in 65-nm CMOS technology with 100 on-chip antennas and also 100 corresponding integrated pulse generating circuits.

A 0.25-μm Si-Ge millimeter-wave damping pulse transmitter chip with on-chip loop antenna array

This paper presents a 100–120-GHz pulse transmitter chip with a 54×24 on-chip loop antenna array for indoor millimeter wave (mm-wave) imaging applications. This 4-mm×4-mm transmitter for the purpose of beam-forming is designed and fabricated in a 2.5-V 0.25-μm 4-metal-layer Si-Ge Bi-CMOS process. The 23-μm×23-μm loop antenna located on the top-metal layer operates as an inductor in an mm-wave pulse generating circuit. Each of the on-chip damping pulse generators includes an R-L-C circuit, a BJT operated as a switch and a CMOS inverter chain circuit for shaping the rising edge of the input clock. Simulation results by EMDS, ADS 2009 and HSPICE show that loop antennas inductance and resistance at 80–120 GHz are 51 pH and 3 Ω, respectively. By using an mm-wave power meter, a 90–140-GHz standard horn antenna and a Schottky diode detector, we demonstrate the ability of an integrated mm-wave pulse generator for the purpose of beam-forming.

A 0.18-μm CMOS shock wave generator with an on-chip antenna and a digitally programmable delay circuit

A 9–11-GHz fully integrated shock wave generator using a 0.18-μm CMOS process for in-door active imaging applications is presented. This chip includes an on-chip wideband meandering dipole antenna, a shock wave generator and a 5-bit digitally programmable delay circuit. The pulse generator simulation produces a 0.4-V peak–peak (p-p) pulse amplitude with a 45.86-ps monopulse cycle in simulation. The integrated dipole antennas bandwidth −10 dB is 25.3 GHz in EMDS, ADS 2008 simulation. A 20-dB standard horn antenna with distance of 38 mm to this chip is used for the measurement. Measurement results show that 9–11-GHz pulse frequency response with 1.1-mVp-p pulse output voltage received from the horn antenna and 3-ps delay control resolution are suitable for fully on-chip pulse beam forming purpose with integrated antenna array.