Nick Moll

Pulse-doped AlGaAs/InGaAs pseudomorphic MODFETs

MODFETs have been fabricated using heterojunctions consisting of AlGaAs and pseudomorphic InGaAs, grown on GaAs substrates. The large conduction band discontinuity (about 0.46 eV for 25% In and Al concentration) leads to a 2-D electron density as high as 2.3*10/sup 12/ cm/sup -2/, with electron mobilities of 7000 and 16000 cm/sup 2//V-s at 300 and 77 K, respectively. Such a high electron density in combination with reasonable transport properties leads to MODFETs with exceptional characteristics. Devices with 0.15-0.25- mu m gate length have room-temperature drain currents as high as 600 mA/mm and room-temperature transconductance as high as 500 mS/mm. The f/sub T/ is as high as 98 GHz, as determined by 20-dB/decade extrapolation of microwave data taken to 25 GHz. A comparison of the effect of bias on the total delay through standard and pseudomorphic MODFETs suggests that the excellent microwave performance exhibited by the pseudomorphic device arises from a reduction in parasitic and drain delays and not from a higher electron velocity under the gate. >

An analytical study of etch and etch‐stop reactions for GaAs on AlGaAs in CCl2F2 plasma

We have studied selective reactive ion etching of GaAs on AlGaAs in CCl2F2 plasma in situ by optical emission spectroscopy and mass spectrometry and have analyzed etched surfaces, before and after air exposure, by x‐ray photoelectron spectroscopy. Data from etching GaAs samples indicate that volatile arsenic fluorides, chlorides and fluorochlorides, and gallium chlorides are the products formed, leaving a stoichiometric GaAs surface with adsorbed F and Cl for the particular plasma conditions we used. Data from samples etched to AlGaAs, where the etching process stops, demonstrate that the stopping is due to formation of nonvolatile AlF3 and GaClxFy, leaving a surface nearly depleted of arsenic. This etch‐stop ‘‘layer’’ is between 4 and 10 monolayers in thickness. After air exposure this surface consists of gallium and aluminum oxides and a small percentage of arsenic oxide with about the same quantities of Ga, Al, and As as on the surface before exposure to air. This differs from a wet‐etched (in dilute a...

Be diffusion in InGaAs/InP heterojunction bipolar transistors

Classic signatures of Be diffusion were observed in InAlAs/InGaAs HBTs after elevated temperature bias stress, i.e., a positive shift in the Gummel plot, higher collector ideality, and higher offset voltage. An activation energy of 1.57 eV was calculated. Lifetimes of 3.3/spl times/106 h and 37000 h were extrapolated for low and high power operation, respectively. In contrast, an InP/InGaAs HBT with a C doped base showed no signatures of C diffusion. The results show that Be diffusion is manageable at lower power. They also support the idea that C is more stable than Be in this material system.

Improved microwave performance in transistors based on real space electron transfer

Experimental results on an improved type of transistor based on real space electron transfer are presented. Microwave measurements through 25 GHz show an extrapolated fT of 60 GHz and a measured fMAX of 18 GHz. These gain‐bandwidth products are approximately twice as high as any previously reported for this relatively new class of device. This improvement in performance results from a novel device design which incorporates a doped, pseudomorphic InGaAs channel, a GaAs collector drift region, and a collector‐up structure.

Drain resistance degradation under high fields in AlInAs/GaInAs MODFETs

Lattice-matched AlInAs/GaInAs modulation-doped FETs (MODFETs) demonstrate excellent high-frequency, small-signal performance. However, high-power, large-signal applications of these devices may be limited. Impact ionization and tunneling reduce the breakdown voltage, which limits the upper end of the output voltage swing, thus reducing the output power. Our results indicate that the lower end of the voltage swing (knee voltage) is also degraded by increased drain resistance when impact ionization occurs. In this work, we correlate R/sub d/ degradation in the AlInAs/GaInAs material system to the presence of impact ionization. The magnitude of R/sub d/ degradation depends on the applied drain bias and drain current. These factors affect the degree of impact ionization, and thus the extent of the degradation. Since R/sub d/ increases and R/sub s/ does not, only the high field side of the FET is affected. This increase in R/sub d/ is attributed to a wider carrier depletion region between the gate and drain after stress, which results in reduced device performance.

Semi-analytical analysis for optimization of 0.1-/spl mu/m InGaAs-channel MODFETs with emphasis on on-state breakdown and reliability

We have measured and analyzed the bias limitations of our 0.1-/spl mu/m In/sub 53/Ga/sub 47/As-channel MODFETs. A semi-analytical model allows us to correlate a major degradation mechanism, the increase in drain resistance to impact ionization in the narrow-bandgap channel. We find, as others have, that this mechanism also determines the on-state breakdown voltage BV/sub DS//sup (on)/, and thus limits the operating regime. The modeling predicts the shape of BV/sub DS//sup (on)/ vs. I/sub D/ and shows that the off-state breakdown voltage is irrelevant for practical load-lines. BV/sub DS//sup (on)/(I/sub D/) deviates markedly from a constant power locus. In fact, it tends to have a flat minimum BV/sub DS//sup (on,min)/ (corresponding to maximum impact ionization current) near the I/sub D/ of maximum transconductance. BV/sub DS//sup (on,min)/ becomes the most significant measure of FET breakdown. Most of our device variations have tended to produce a constant-power trade-off of BV/sub DS//sup (on,min)/ with its associated I/sub D/, in contrast to the non-constant-power locus of BV/sub DS//sup (on)/(I/sub D/) The model predicts both trends well.

Surface contamination and damage from CF 4 and SF 6 reactive ion etching of silicon oxide on gallium arsenide

Two reactive ion etchants, CF4 and SF6, have been compared in terms of plasma characteristics, silicon oxide etch characteristics, extent of RIE damage, and formation of barrier layers on a GaAs surface after oxide etch. It was found that higher etch rates with lower plasma-induced dc bias can be achieved with SF6 plasma relative to CF4 plasma and that this correlates with higher atomic fluorine concentration in SF6 plasma. RIE damage, measured by loss of sheet conductance in a thin highly-doped GaAs layer, could be modelled as a region of deep acceptors at a high concentration in the conductive layer. By relating the sheet conductance change to the modelled damaged layer thickness, it was found that the RIE-damaged thickness from both CF4 and SF6 plasmas had the same linear relation to plasma dc bias. Barriers to subsequent GaAs RIE were created during oxide overetch at the GaAs surface. The barriers were identified by XPS as ∼20 A of GaF3 for CF4 plasma and ∼30 A of GaF3 on top of AsxSy for SF6 plasma. Ellipsometry was used to routinely determine the presence or absence of the barriers which could be removed in dilute ammonia.

Low-Noise Bias Reliability of AlInAs/GaInAs Modulation-Doped Field Effect Transistors with Linearly Graded Low-Temperature Buffer Layers Grown on GaAs Substrates

The low-noise bias reliability of 0.1 µm T-gate Al0.48In0.52As/Ga0.47In0.53As modulation-doped field effect transistors (MODFETs), grown on GaAs was investigated. Al0.48In0.52As/Ga0.47In0.53As MODFETs were grown on mismatched GaAs substrates by the insertion of a compositionally linearly-graded low-temperature buffer (LGLTB) layer. Transmission electon microscopy (TEM) analysis of the layers indicates that the majority of the defects are confined to the buffer layer. Although the LGLTB layer is highly defective, there is no indication that the low-bias reliability of these devices is compromised. MODFETs with a LGLTB layer show reliability under high temperature operating life (HTOL) tests at a drain bias of 1 V and 200 mA/mm, comparable to reported MODFETs grown lattice-matched to InP. The extrapolated mean-time-to-failure (MTTF), based on the drift of the zero-gate bias current, Idss, at temperatures of 200 to 240°C, exceeds 106 h at a channel temperature of 125°C. The drift in Idss arises primarily from a positive shift in threshold voltage. The low-bias Rd degradation behavior of these devices is also similar to devices grown on InP.

Low-noise bias reliability of AlInAs/GaInAs MODFETs with linearly graded low-temperature buffer layers grown on GaAs substrates

AlInAs/GaInAs MODEETs lattice-matched to InP have been shown to be reliable at low bias (V/sub ds/=0.75 to IV) for low-noise applications. Mean-times to failure (MTTF) from 10/sup 5/ to 10/sup 7/ hrs., based on various failure criteria, have been reported for lattice-matched FETs. To improve manufacturability of these FETs we have fabricated 0.1 /spl mu/m T-gate AlInAs/GaInAs MODFETs on mismatched GaAs substrates by the insertion of a compositionally linearly graded low-temperature buffer (LGLTB) layer. In this work, we demonstrate that such FETs show comparable reliability at low bias under high temperature operating life (HTOL) tests to FETs on InP. Although the LGLTB layer is highly defective, there is no indication that the low-bias reliability of these devices is compromised. Our AlInAs/GaInAs MODFETS, grown on GaAs, have an extrapolated MTTF, based on I/sub dss/ drift, exceeding 10/sup 6/ hours at a channel temperature of 125/spl deg/C.

Design and surface chemistry of nonalloyed ohmic contacts to pseudomorphic InGaAs on n+GaAs

Pseudomorphic layers of molecular‐beam‐epitaxy (MBE) grown InxGa1−xAs (xIn =.25 and 0.35) on heavily doped GaAs were studied for nonalloyed emitter and collector contacts to heterojunction bipolar transistors. Since the InGaAs layers in this study are coherent to the GaAs lattice, subsequent epitaxial layers can be grown after the ohmic contact with high quality. Contact resistances as low as 5×10−7 Ω cm2 have been obtained for a 60‐A layer of n+ InGaAs (x=0.35). These contact resistances are achieved through a combination of heavy silicon doping, which leads to a greater net donor concentration in InGaAs than in GaAs, and a low Schottky barrier height. The InGaAs layers, which are grown at a temperature of 380 °C, are heavily silicon doped to 2.4×1019 cm−3 by lowering the MBE growth rate. The chemical composition of the InGaAs surface was analyzed by X‐ray photoelectron spectroscopy after selective etching in NH4OH:H2O2:H2O and after various surface treatments. The selectivity of the etch arises from the...