Nicolas Constantin

High-Efficiency Wideband Rectifier for Single-Chip Batteryless Active Millimeter-Wave Identification (MMID) Tag in 65-nm Bulk CMOS Technology

This paper presents the development and demonstration of a high-efficiency rectifier for millimeter-wave-to-dc energy conversion. It is a critical circuit block that renders possible the use of a single CMOS chip die with no substrate and wiring, as the implementation of a batteryless, yet active tag for next-generation high data-rate millimeter-wave identification technologies. We also propose an architecture of a reader-tag system that addresses the underlying technical challenges. The rectifier is based on a differential drive cross-coupled topology that has been shown to work at UHF frequencies only so far. In this paper, we investigate significant challenges in implementing this topology at millimeter-wave frequencies with good power conversion efficiency (PCE). The analyses, design, and results presented in this work demonstrate the feasibility of achieving this by minimizing simultaneously the small on-resistance and the reverse leakage current in the MOS transistors, and by reducing losses and parasitic capacitances through proper transistor sizing and layout optimization. Using a standard 65-nm bulk CMOS process, a chip was designed, fabricated, and tested under different input and output loading conditions. The rectifier exhibits an overall PCE of 20% at 24 GHz, 18% at 35 GHz, and 11% at 60 GHz under RF available driving power of 6, 6, and 3 dBm, respectively, and output load resistance of 1, 1, and 2 kΩ, respectively. These PCE performances at millimeter-wave frequencies have never been reported in the literature.

GaAs FET's gate current behavior and its effects on RF performance and reliability in SSPAs

This paper presents a detailed experimental investigation of gate current limitation effects on power GaAs FETs rf performances. This limitation is accomplished entirely by dynamic compensation of the gate bias voltage. Effects of this current limitation on power added efficiency and output power performances have been examined through an extensive experimental investigation using active second-harmonic loading over the entire Smith chart. Comprehensive results are given and enable the determination of the optimal gate resistor value needed in the dc path for gate current limitation. Thermal runaway problem is also considered when selecting the gate resistor. The current limitation mechanism is analyzed in the case where the gate voltage is controlled in a feedback loop for linearization purposes. Measurements performed on a feedback linearized amplifier are presented and show the behavior of the gate current and its effects on intermodulation product levels.

Formulations and a Computer-Aided Test Method for the Estimation of IMD Levels in an Envelope Feedback RFIC Power Amplifier

This paper presents new formulations, together with an efficient computer-aided test approach intended for radio frequency integrated circuit power amplifiers (PAs), allowing the estimation of linearity requirements for the circuit blocks typically found in the error signal path of an envelope feedback amplifier. The formulations are based on a three-tone excitation, allowing analysis of intermodulation distortion (IMD) within the feedback system using parameterized peak-to-average envelope voltage. They are also based on a fifth-degree representation, and may be extended to higher degrees of nonlinearities in the RF PA block, enabling IMD analysis of envelope feedback amplifiers at low power. The approach proposed in this paper circumvents the difficulty of measuring error signals during closed-loop operation for troubleshooting purposes. This approach is also very useful for computer-aided test setups intended for development work independent of the often idealized circuit simulation environment.

Low-Power Injection-Locked Zero-IF Self-Oscillating Mixer for High Gbit/s Data-Rate Battery-Free Active

In this paper, a low-power zero-IF self-oscillating mixer (SOM) for a new generation of high data-rate battery-free, yet active μRFID tag (a fully integrated RF identification tag on a single CMOS die with no external components, nor packaging) operating at millimeter-wave frequencies is proposed and demonstrated. It exploits, on one hand, the intrinsic mixing properties of an LC cross-coupled voltage-controlled oscillator, and on the other hand, the injection-locking properties in oscillators. By injection locking the SOMs natural oscillation frequency to the readers carrier frequency (a frequency that bears information of the tag: reader-to-tag communication), it enables a direct-conversion to the baseband with no external local oscillator (LO) source (self-mixing), nor RF frequency conversion into IF frequency, therefore significantly reducing its power consumption. Up-link communication (tag-to-reader communication) is performed by up-converting the tags data using the same SOM. Furthermore, the in-phase injected energy stabilizes the self-generated LO and enhances the SOM phase noise, resulting into a low-phase noise baseband signal. Using a standard 65-nm CMOS process, a 40-GHz zero-IF SOM was designed, fabricated, and tested. Experimental results exhibit a conversion loss of about 30 dB under -38-dBm injected RF power with a power consumption of only 280 μW during reader-to-tag communication, and 580 μW during tag-to-reader communication.

\mu{\hbox{RFID}}

This paper presents a novel hardware reconfiguration technique implemented in a dual integrated-circuit (IC) GaAs HBT power amplifier (PA) design and demonstrates reduced current and improved efficiency at low power. The method automatically reconfigures the hardware of an RF IC PA over a given power transmission. Hardware interfacing and synchronization from outside the PA is minimized, and automatic gain compensation upon hardware reconfiguration is achieved with minimal temperature-dependant calibration. The challenge of integrating such complex on-chip hardware functions in a GaAs HBT technology was circumvented by the introduction of a gating concept used in conjunction with envelope feedback, and careful tradeoffs between circuit complexity and performance. Designs that suit the on-chip integration of the technique in GaAs HBT or Si bipolar junction transistor technologies are described. Experimental data are reported to support the proposed method.

Tag at Millimeter-Wave Frequencies in 65-nm CMOS

A method for automatic multi-state hardware conditioning of RFIC PAs using a single control line is proposed. A gating technique is introduced to allow an on-chip embodiment of envelope feedback, used to simplify circuits and gain calibration requirements. Experimental results obtained with a GaAs IC implementation totaling an area of only 1.4mm2 show a potential for single chip integration of this technique.

Automatic Hardware Reconfiguration for Current Reduction at Low Power in RFIC PAs

The emerging millimeter-wave identification (MMID) technology is poised to exploit special advantages from operating in this frequency band and to circumvent the limitations of low-frequency RFID. In this work, the state-of-art of innovative techniques, which allow propelling the MMID technology in the front line of future wireless systems such as smart homes, are presented. Two recent developments in our group are highlighted with simulations and experiments, namely (1) extremely miniaturized and highly-secure chipless tag techniques for short- and mid-range; and (2) a new generation of high data-rate, fully integrated, battery-free, yet active MMID tag on a single CMOS die with no external components. In this paper, great potentials and exciting prospects of MMID sensing systems as well as their technological challenges in terms of security, networking, mass production and deployment issues are discussed. Successful development of MMIDs and their penetration into the market constitute a critical future smart living and result in better life in terms of green environment, efficient energy usage and secure information.

A Gated Envelope Feedback Technique for Automatic Hardware Conditioning of RFIC PA's at Low Power Levels

In this paper, a class of high-data-rate battery-free yet active miniature radio-frequency identification tag without any external components (except antenna) operating at millimeter (mm)-wave frequencies is proposed and demonstrated. This fully embedded tag consists of a recently proposed CMOS-based zero-intermediate-frequency self-oscillating mixer, a high power conversion efficiency mm-wave-to-dc rectifier, and an ultralow-power voltage regulator on a single chip, integrated with ceramic-based antennas. Interconnection between the CMOS die and the antenna is realized using a wire-bonding technique, which is compensated and optimized to match the antenna input impedance and also to minimize the wire-bond associated losses at mm frequencies. The 10×10 mm2 tag wirelessly harvests its energy from an incoming signal at 24 GHz, receives, and recovers the data sent by reader on an amplitude modulation (AM)-modulated 40-GHz carrier, and transmits its data back to the reader on a 40-GHz carrier, using AM modulation as well. The tag exhibits a bit rate of about 500 kb/s during the reader-to-tag communication and 10 Mb/s during the tag-to-reader communication, solely relying on the rectified energy for powering its operation. To the best of our knowledge, such an mm-wave identification tag at mm-wave frequencies has never been reported in the literature.

Millimeter-wave identification for future sensing, tracking, positioning and communicating systems

In this paper, a 40 GHz zero-IF self-oscillating mixer (SOM) with low-power consumption, is proposed and demonstrated for the next generation of battery-free yet active mm-wave identification (MMID) tag. It exploits the mixing property of LC cross-coupled VCO, and by injection-locking the SOM to the readers carrier frequency, it enables a direct-conversion to the baseband. It, therefore, does not require any external LO source (self-mixing) nor RF frequency conversion into IF frequency. A chip was designed using 65-nm CMOS process, and experimental results exhibit a conversion loss of about 29 dB, with a power consumption of only 280 μW.

High-Data-Rate Single-Chip Battery-Free Active Millimeter-Wave Identification Tag in 65-nm CMOS Technology

This paper presents an equations based approach for estimating the linearity requirements for the RF envelope detectors and the other circuit blocks typically found in the error signal path of an envelope feedback amplifier. The proposed equations are based on a three-tone excitation and a 5th degree power series representation of the nonlinearities in the RF power amplifier block, which allows estimating inter-modulation distortion within the feedback system using peak-to-average envelope voltage ratios that may be parameterized. The proposed approach for validating and optimizing the linearity performances of the envelope detectors in open loop conditions, as a function of feedback parameters and closed loop IMD goals, can be used to analyze envelope feedback systems during the design phase, and may be particularly helpful for circuit characterization independently of the simulation environment.