Nicolas Guillevin

High Efficiency n-Type Metal-Wrap-Through Cells and Modules Using Industrial Processes

We report on our high efficiency n-type metal-wrap-through (MWT) cell and module technology. In this work, bifacial n-type MWT cells are produced by industrial processes in industrial full-scale and pilot-scale process equipment. N-type cells benefit from high recombination lifetime in the wafer and bifaciality. Also low-cost screen printed cells can yield over 20% efficiency. When combined with MWT technology, high-power back-contact modules result, which can employ very thin cells. We report a cell conversion efficiency of 20.5% (in-house measurement, certification pending), a significant gain compared to our earlier work. We will discuss performance of thin cells relative to thicker cells, comparing experimental results to modeling. Recently, two aspects of (mainly p-type) MWT technology have received increased attention: paste consumption and performance under reverse bias. We will discuss MWT paste consumption, showing how MWT technology, like multi-busbar technology, can support very low paste consumption. We also report on behavior of cells and modules under reverse bias. We also discuss the robustness of MWT technology to dissipation in hot spots under reverse bias. Finally, full-size modules have been made and cell-to-module ratios of the different I-V parameters were analysed. Modules from cells with average efficiency over 20% are pending. This work shows that low-cost n-type bifacial cells are suitable for industrial high efficiency back-contact technology.

ECN n-Type Silicon Solar Cell Technology: An Industrial Process that Yields 18.5%

There is currently much interest in n-type solar cells because of the advantages of this material. N-type material is expected to be more favourable for obtaining high efficiencies than p-type doped substrates. We have developed a process for n-type solar cells for large area multicrystalline and monocrystalline silicon wafers. The production process is based on industrial processing steps such as screen-printed metallization and firing through. The surfaces of these cells are passivated with a layer stack consisting of SiO2 and SiNx where the former is created by a wet chemical process and the latter by inline PECVD. We demonstrate that the surface passivation can be improved with an alternative wet chemical process for creating the SiO2 layer. This new process results in an enhancement of the implied Voc of unmetallized cells as measured by quasi-steady-state photoconductance (QSSPC) and the Voc of completed cells. The process Improvements have yielded a new record efficiency of 18.5 % (for a particular rear reflection surface) that was independently confirmed by Fraunhofer ISE CalLab.

ECN n-type silicon solar cell technology: An industrial process that yields 18.5%

There is currently much interest in n-type solar cells because of the advantages of this material. N-type material is expected to be more favourable for obtaining high efficiencies than p-type doped substrates. We have developed a process for n-type solar cells for large area multicrystalline and monocrystalline silicon wafers. The production process is based on industrial processing steps such as screen-printed metallization and firing through. The surfaces of these cells are passivated with a layer stack consisting of SiO 2 and SiN x where the former is created by a wet chemical process and the latter by inline PECVD. We demonstrate that the surface passivation can be improved with an alternative wet chemical process for creating the SiO 2 layer. This new process results in an enhancement of the implied V oc of unmetallized cells as measured by quasi-steady-state photoconductance (QSSPC) and the V oc of completed cells. The process Improvements have yielded a new record efficiency of 18.5 % (for a particular rear reflection surface) that was independently confirmed by Fraunhofer ISE CalLab.

Full size IBC module based on industrially processed 95 µm thin cells with a CtM power loss < 1%

The production of silicon feedstock and wafers is energy intensive and the costs of the wafers are a significant part of the total module costs. The application of thinner wafers and cells is a way to an improved environmental profile (lower CO2 footprint and energy payback time) and save Si material costs. We present here the results of a successful processing run of more than 100 pieces of ~95 μm thin IBC cells using an industrial compatible process flow based on screen-printing, starting from 120 μm thick 6 inch n-type Cz diamond wire cut wafers. A selection of 60 thin cells (process based on homo-junctions and not fully optimized for this thickness) with an average conversion efficiency of 19.4 % was made for integration in a full sized 60 cells module applying our foil based back contact module interconnection technology using dedicated industrial equipment and standard Bill of Materials (BoM) including electrically conductive adhesives. The module was made without any breakage of cells and revealed a total power output of 277 W, corresponding to a Cellto-Module (CtM) power loss of < 1 %. Electroluminescence spectroscopy revealed only minor issues in terms of micro crack formation, demonstrating the full compatibility of the back contact module configuration with thin back-contacted cells.

Designing IBC cells with FFE: Long range effects with circuit simulation

IBC cells with Front Floating Emitter (FFE) pose different design challenges compared to more conventional IBC cells with FSF (Front Surface Field). The FFE enables hole transport over distances that are large compared to the typical BSF or emitter width. The core of the cell design is commonly a device simulation in which, because of the computer resources involved, typically one simulates an as small as possible, but representative part of the solar cell. In an IBC cell this corresponds to 1/2 of the BSF and 1/2 of the emitter. Such a unit cell does not account for important geometric features, such as busbars and pads, edges or interruptions in metallization fingers. We show how to construct an equivalent circuit for our Mercury FFE IBC cells to model features beyond the unit cell efficiently, taking into account the lateral hole transport in the FFE. We compare and calibrate the circuit model against device simulations with quokka.