Ninad Pimparkar

Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates

The ability to form integrated circuits on flexible sheets of plastic enables attributes (for example conformal and flexible formats and lightweight and shock resistant construction) in electronic devices that are difficult or impossible to achieve with technologies that use semiconductor wafers or glass plates as substrates. Organic small-molecule and polymer-based materials represent the most widely explored types of semiconductors for such flexible circuitry. Although these materials and those that use films or nanostructures of inorganics have promise for certain applications, existing demonstrations of them in circuits on plastic indicate modest performance characteristics that might restrict the application possibilities. Here we report implementations of a comparatively high-performance carbon-based semiconductor consisting of sub-monolayer, random networks of single-walled carbon nanotubes to yield small- to medium-scale integrated digital circuits, composed of up to nearly 100 transistors on plastic substrates. Transistors in these integrated circuits have excellent properties: mobilities as high as 80 cm2 V-1 s-1, subthreshold slopes as low as 140 m V dec-1, operating voltages less than 5 V together with deterministic control over the threshold voltages, on/off ratios as high as 105, switching speeds in the kilohertz range even for coarse (∼100-μm) device geometries, and good mechanical flexibility—all with levels of uniformity and reproducibility that enable high-yield fabrication of integrated circuits. Theoretical calculations, in contexts ranging from heterogeneous percolative transport through the networks to compact models for the transistors to circuit level simulations, provide quantitative and predictive understanding of these systems. Taken together, these results suggest that sub-monolayer films of single-walled carbon nanotubes are attractive materials for flexible integrated circuits, with many potential areas of application in consumer and other areas of electronics.

High-performance electronics using dense, perfectly aligned arrays of single-walled carbon nanotubes

Single-walled carbon nanotubes (SWNTs) have many exceptional electronic properties. Realizing the full potential of SWNTs in realistic electronic systems requires a scalable approach to device and circuit integration. We report the use of dense, perfectly aligned arrays of long, perfectly linear SWNTs as an effective thin-film semiconductor suitable for integration into transistors and other classes of electronic devices. The large number of SWNTs enable excellent device-level performance characteristics and good device-to-device uniformity, even with SWNTs that are electronically heterogeneous. Measurements on p- and n-channel transistors that involve as many as approximately 2,100 SWNTs reveal device-level mobilities and scaled transconductances approaching approximately 1,000 cm(2) V(-1) s(-1) and approximately 3,000 S m(-1), respectively, and with current outputs of up to approximately 1 A in devices that use interdigitated electrodes. PMOS and CMOS logic gates and mechanically flexible transistors on plastic provide examples of devices that can be formed with this approach. Collectively, these results may represent a route to large-scale integrated nanotube electronics.

Theory of transfer characteristics of nanotube network transistors

Carbon nanotubes (CNT) nanocomposites used for thin-film transistors (TFTs) provide one of the first technologically-relevant test beds for two-dimensional heterogeneous percolating systems. The characteristics of these TFTs are predicted by considering the physics of heterogeneous finite-sized networks and interfacial traps at the CNT/gate-oxide interface. Close agreement between our numerical results and different experimental observations demonstrates the capability of the model to predict the characteristics of CNT/nanowire-based TFTs. Such predictive models would simplify device optimization and expedite the development of this nascent TFT technology.

Limits of Performance Gain of Aligned CNT Over Randomized Network: Theoretical Predictions and Experimental Validation

Nanobundle thin-film transistors (NB-TFTs) that are based on random networks of single-walled carbon nanotubes are often regarded as high performance alternative to amorphous-Si technology for various macroelectronic applications involving sensors and displays. Here, we use stick-percolation model to study the effect of collective (stick) alignment on the performance of NB-TFTs. For long-channel TFT, small degree of alignment improves the drain current due to the reduction of average path length; however, near-parallel alignment degrades the current rapidly, reflecting the decrease in the number of connecting paths bridging the source/drain. In this paper, we 1) use a recently developed alignment technique to fabricate NB-TFT devices with multiple densities D, alignment thetas, stick length LS, and channel length LC; 2) interpret the experimental data with a stick- percolation model to develop a comprehensive theory of NB-TFT for arbitrary D,thetas, LS, and LC; and 3) demonstrate theoretically and experimentally the feasibility of fivefold enhancement in current gain with optimized transistor structure.

Performance Assessment of Subpercolating Nanobundle Network Thin-Film Transistors by an Analytical Model

Nanobundle network thin-film transistors (NB-TFTs) have emerged as a viable higher performance alternative to polysilicon and organic transistors with possible applications in macroelectronic displays, chemical/biological sensors, microelectronic high power transistors, and photovoltaics. A simple analytical model for current-voltage (I-V) characteristics of the NB-TFTs (below the global percolation limit) is proposed and validated by numerical simulation and experimental data. The physics-based predictive model provides a simple relation between the transistor characteristics and the design parameters which can be used for optimization of NB-TFTs. The model provides important insights into the recent experiments on the NB-TFT characteristics and electrical purification of the NB networks

N-Type Field-Effect Transistors Using Multiple Mg-Doped ZnO Nanorods

Nanorod field-effect transistors (FETs) that use multiple Mg-doped ZnO nanorods and a SiO2 gate insulator were fabricated and characterized. The use of multiple nanorods provides higher on-currents without significant degradation in threshold voltage shift and subthreshold slopes. It has been observed that the on-currents of the multiple ZnO nanorod FETs increase approximately linearly with the number of nanorods, with on-currents of ~1 muA per nanorod and little change in off-current (~4times10-12). The subthreshold slopes and on-off ratios typically improve as the number of nanorods within the device channel is increased, reflecting good uniformity of properties from nanorod to nanorod. It is expected that Mg dopants contribute to high n-type semiconductor characteristics during ZnO nanorod growth. For comparison, nonintentionally doped ZnO nanorod FETs are fabricated, and show low conductivity to compare with Mg-doped ZnO nanorods. In addition, temperature-dependent current-voltage characteristics of single ZnO nanorod FETs indicate that the activation energy of the drain current is very low (0.05-0.16 eV) at gate voltages both above and below threshold

A “Bottom-Up” Redefinition for Mobility and the Effect of Poor Tube–Tube Contact on the Performance of CNT Nanonet Thin-Film Transistors

Nanonet thin-film transistors (NN-TFTs) based on random or aligned networks of single-wall carbon nanotubes are often regarded as a promising high-performance alternative to amorphous-Si technology for various macroelectronics applications involving sensors and displays. The comparison of NN-TFTs with other competing technologies such as organic, a-Si, and p-Si TFTs, however, has proved difficult as the mobility of these devices (counterintuitively) depends on a host of geometrical parameters such as tube density D, tube length LS, channel length LC, tube-tube contact C ij, etc. In this letter, we redefine the mobility for NN-TFTs by generalizing the classical definition from a ldquobottom-uprdquo perspective based on a stick percolation model. This new definition would allow a direct comparison of NN-TFT mobilities across different laboratories and with other competing technologies. We also suggest a simple experimental measure of the critical tube-tube contact C ij parameter to allow design of optimized transistors.

Self-consistent electrothermal analysis of nanotube network transistors

We develop an electrothermal transport model for nanocomposite thin films based on self-consistent solution of drift-diffusion and Poisson equations for electrons coupled with diffusive transport of heat. This model is used to analyze the performance of an electronic display the pixels of which are controlled by carbon nanotube (CNT) network thin-film transistors (TFTs). The effect of electrothermal coupling on device performance and steady state temperature rise is analyzed as a function of key device parameters such as channel length, network density, tube-to-substrate thermal conductance, and tube-to-substrate thermal conductivity ratio. Our analysis suggests that device on-current Ion may reduce by 30% for a 1 μm channel length devices due to self-heating. The temperature rise in such devices can be as high as 500 K in extreme cases due to the thermally insulating substrate and the low tube-to-substrate thermal conductance. These results suggest that an appropriate combination of network density, chan...

Performance assessment of sub-percolating nanobundle network transistors by an analytical model

Nanobundle network transistors (NBTs) have emerged as a viable, higher performance alternative to poly-silicon and organic transistors with possible applications in macroelectronic displays, chemical/biological sensors, and photovoltaics. A simple analytical model for I-V characteristics of NBTs (below the percolation limit) is proposed and validated by numerical simulation and experimental data. The physics-based predictive model provides a simple relation between transistor characteristics and design parameters which can be used for optimization of NBTs. The model provides important insights into the recent experiments on NBT characteristics and electrical purification of nanobundle networks

Device optimization for organic photovoltaics with CNT networks as transparent electrode

Recently, there has been a lot of interest in flexible and high efficiency solar cells due to cost advantages of roll to roll printing. Traditionally, ITO (Indium Tin Oxide) or ZnO (Zinc Oxide) electrodes have been used as top contacts for solar cells because of their reasonable transparency and moderately low sheet resistance. However, these electrodes are not flexible and would undergo breakdown on bending of flexible substrates. Hence, several groups are working on various types of flexible electrodes which have better optical transparency as well as have high electrical conductivity. Among the various options, CNT (Carbon Nanotube) random networks have emerged as a viable alternative to ITO and ZnO, satisfying these constraints and indeed, several types of solar cells (1–5) have been reported with CNT random networks as back contact. These experimental reports have so far not been complemented by meaningful modeling of CNT networks in solar cells for performance optimization of the solar cell device design. Here, for the first time we present comprehensive simulation results for organic excitonic solar cells with CNT networks as back contact that analyzes all elements of the solar-cell within an end-to-end theoretical framework. In our previous work, we have done extensive modeling of the CNT networks for usage as transistor channel material 6, 7 and here we use the previously established techniques to model CNT networks as electrodes. Our analysis shows that optimizing the CNT density is critical to achieve the best tradeoff of transparency vs. over all efficiency of the solar cell.