Ning Guan

A low-noise fully-differential CMOS preamplifier for neural recording applications

A fully-differential bandpass CMOS preamplifier for extracellular neural recording is presented in this paper. The capacitive-coupled and capacitive-feedback topology is adopted. We describe the main noise sources of the proposed preamplifier and discuss the methods for achieving the lowest input-referred noise. The preamplifier has a midband gain of 43 dB and a DC gain of 0. The −3 dB upper cut-off frequency of the preamplifier is 6.8 kHz. The lower cut-off frequency can be adjusted for amplifying the field or action potentials located in different bands. It has an input-referred noise of 3.36 μVrms integrated from 1 Hz to 6.8 kHz for recording the local field potentials (LFPs) and the mixed neural spikes with a power dissipation of 24.75 μW from 3.3 V supply. When the passband is configured as 100 Hz-6.8 kHz for only recording spikes, the noise is measured to be 3.01 μVrms. The 0.115 mm2 prototype chip is designed and fabricated in 0.35-μm N-well CMOS (complementary metal oxide semiconductor) 2P4M process.

Implantable CMOS neuro-stimulus chip for visual prosthesis

A prototype chip with 2×2 pixels for implanting in blind patients affected by outer retinal degeneration is presented in this paper. This visual prosthesis chip imitates the degenerated photoreceptor cells, senses the incident light and stimulates the remaining healthy layers of retina or optic nerve. Each pixel integrates photodiode and stimulus pulse generator, converting the illumination on the eyes into 3-bit resolution bi-phasic current pulses. On-chip charge cancellation modules are used to discharge each electrode site for tissue safety. The prototype chip is designed and fabricated in 0.18-μm N-well CMOS (complementary metal oxide semiconductor) 1P6M Mix-signal process, with a ±2.5 V dual voltage supply. The functionality of the fabricated chip is demonstrated on anesthetized rabbits. Neural responses in visual cortex are successfully evoked by the neuro-stimulus chip through an on-board trigger interface and flexible electrode.

Implantable microsystem for wireless neural recording applications

A prototype microsystem is presented for wireless neural recording application. An inductive link was built for transcutaneous wireless power transfer and data transmission. Total 16.5 mW power and 50 bps – 2.5 Kbps command data can be received over 1 – 5 MHz with a distance of 0-10 mm. The integrated amplifiers were designed with a limited bandwidth for neural signals acquisition. The gain of 60 dB was obtained by preamplifier at 7 Hz – 3 KHz. An integrated FM transmitter was used to transmit the extracted neural signals to external equipments with 0.374 – 2 mW power comsumption and a maximum data rate of 500 Kbps at 100 MHz. All the integrated circuits modules except the power recovery circuit were tested or stimulated under a 3.3 V power supply, and fabricated in standard CMOS processing.

A low-voltage two-wavelength light emitter in standard CMOS technology

A silicon light emitting device is fabricated in standard CMOS technology. It can emit visible light under reverse Zener breakdown and emit near infrared light under forward injection, both with low-voltage operation and enhanced efficiency.

Real-time multi-channel system for neural spikes acquisition and detection

A real-time multi-channel system for neural spikes acquisition and detection is presented in this paper. It incorporates self-designed micro-machined silicon recording probes, specific multi-channel biomedical amplifiers, analog-to-digital converters and a digital signal processor. The system can inspect 32 channels of neural signals, detect the spikes simultaneously, and display 1 channel of the original signals and 32 channels of detection results on the PC screen. The function of the system is verified in a saline environment and the accuracy of the spike detection is 95%. Such system can be used as a head stage for free-moving and long-term recording, and even closed-loop recording and stimulating applications.

CMOS image sensor with optimal video sampling scheme

Time-varying illumination on the focal plane is a three-dimensional signal. Multidimensional sampling theory proves that the temporal resolution can be optimally improved by a factor of

Temporal differential CMOS image sensor for low-light and high-speed applications

\sqrt 2

Silicon-based LED display array in standard CMOS technology

while the spatial resolution is reserved by changing the sampling scheme. Based on the theory, a prototype multi-field CMOS image sensor (CIS) is designed for a 0.35-μm 2P4M CMOS process. Corresponding pixels in 4×4-pixel clusters are assembled into 16 fields over the whole array. Control pins (resets and shutters) of pixels are separated which provides the ability of sampling the illumination with the optimal sampling scheme.