Nobuo Asano
Panasonic
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Publication
Featured researches published by Nobuo Asano.
international conference on acoustics, speech, and signal processing | 1995
Toshihiro Ishikawa; S. Marui; Masayuki Yamasaki; Katsuhiko Ueda; Nobuo Asano; Mitsuru Uesugi; Yoshiko Saitoh; Yukihiro Fujimoto; Susumu Furushima
A new DSP architecture for equalizing, channel coding/decoding and encryption/decryption required by GSM hand portable terminals is presented. In the DSP, called EQCHAN (equalizer and channel coding/decoding processor), these tasks are managed in common units, that is, the data processing unit (DPU) and the bit manipulation unit (BMU). The LSI that contains EQCHAN was designed using 0.8 /spl mu/m CMOS technology and its die size is 123 mm/sup 2/. The power consumed in the LSI is 60 mW at 3.6 V under a continuous communication mode and this value is sufficient for a portable terminal. We describe the detail architecture of EQCHAN.
Archive | 1993
Nobuo Asano; Mitsuru Uesugi; Toshihiro Ishikawa
Archive | 1994
Osamu Kato; Nobuo Asano
Archive | 1998
Nobuo Asano
Archive | 1994
Nobuo Asano; Osamu Kato
Archive | 1994
Nobuo Asano; Osama Kato
Archive | 1994
Nobuo Asano; Osamu Kato
Archive | 1995
Takayuki Nakano; Osamu Apt Hiyoshi Nichimo Dai Coporasu Kato; Nobuo Asano
Archive | 1998
Nobuo Asano; Izumi Horikawa
Archive | 1995
Nobuo Asano; Osamu Kato
