Norbert Seliger

Reliability model for al wire bonds subjected to heel crack failures

Abstract In power electronic packages wire bonding is used for the electrical contact of the chips and for interconnections on the module substrate. Limiting factors for the reliability are solder fatigue and wire bond failures. In this work we investigate the material fatigue of aluminum bonding wires stressed by cyclic lateral bonding area displacement. Bond wire heel crack failures observed by experiments are found to be strongly dependent on the loop geometry. Based on a finite element model that accounts for elastic-plastic material properties, a life-time model for the Al wire (Coffin-Manson representation) is derived from the experiments.

Damage analysis in smart-power technology electrostatic discharge (ESD) protection devices

Abstract Electrostatic discharge (ESD) stress - induced damage is analyzed in smart-power technology ESD protection devices. The lateral position of the ESD damage in diode and npn transistor protection structures is analyzed by using backside infrared microscopy. The lateral extension of the ESD damage is correlated with the magnitude and shape of the IV characteristics. The vertical position of the ESD damage and its stress-induced progress from the surface contact region to the bulk is obtained from the analysis of the stress-evolution of both the reverse and forward leakage current characteristics and from numerical analysis. The damage penetration into the zero-bias space charge region of the breakdown-voltage controlling pn junction is indicated by the onset of the increase of the forward leakage current.

Reliability of High Temperature Inverters for HEV

The requirements for the reliability of electronic circuits becomes constantly higher. Therefore, in particular, the strongly growing automotive industry will be influenced, where the number of electronic circuits and the installed power is constantly increasing. Meanwhile for example a hybrid vehicle can be powered by an electrical system with more than 100 kW. The increasing power density of these circuits and the use of the components at higher ambient temperatures lead to the fact that the electronic components will heat up more and more. Additionally the further integration of electronic components requires a higher reliability of single semiconductors. With higher complexity it is more and more a challenge to prove the total reliability of these circuits by accelerated tests. Siemens has been working on the reliability of high temperature applications for years. This article describes a simulation concept, which calculates the crack propagation speed of bond and solder joint connections. Input parameters for the simulation are: Material properties, geometry and different stress types as current loads or temperature. This procedure is demonstrated on the basis of the power electronics for a hybrid drive system.

A laser beam method for evaluation of thermal time constant in smart power devices

We present a non-invasive optical method based on infrared laser interferometry to study the thermal time constant in dielectrically isolated smart power devices. By analyzing the time domain optical reflectivity signal, the thermal time constant is determined independently of the applied heating power. Experimental values of the time constant are confirmed by calculations using equivalent thermal RC-networks.

Laser interferometric method for ns-time scale thermal mapping of Smart Power ESD protection devices during ESD stress

Abstract A backside heterodyne interferometric technique is presented to study thermal effects in smart-power electrostatic discharge (ESD) protection devices during the ESD stress. The temperature increase in the device active area causes an increase in the silicon refractive index (thermo-optical effect) which is monitored by the time-resolved measurements of optical phase changes. Thermal dynamics and spatial temperature distribution in different types of npn transistor structures biased in the avalanche multiplication or snapback regime are studied with nanosecond time and micrometer spatial resolution. The activity and inactivity of the bipolar transistor action is indicated by the dominant signal arising from the emitter or base region, respectively. Hot spots have been found at the edges of the structures and attributed to the current crowding effect in the emitter.

A 13.56MHz class e power amplifier for inductively coupled DC supply with 95% power added efficiency (PAE)

Recent development of GaN power transistors with blocking voltages up to 650V enables novel power electronics applications with outstanding performance in high-frequency operation. This paper demonstrates a class E power amplifier with 13.56MHz switching frequency for inductively coupled DC power supplies. Continuous wave output power up to 200W is achieved with 95% Power Added Efficiency (PAE).