Nozomu Matsuzaki

A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current

An experimental 512kB embedded PCM uses a current-saving architecture in a 0.13μm 1.5V CMOS. The write scheme features a low-write-current resistive device and achieves 416kB/s write-throughput at 100muA cell current. A charge-transfer direct-sense scheme has a 16b parallel read access time of 9.9ns in an array drawing 280μA. A standby voltage scheme suppresses leakage current in the cell current path and increases the measured PCM cell resistance from 3 to 33MΩ.

Phase change RAM operated with 1.5-V CMOS as low cost embedded memory

This paper describes a phase change (PC) RAM operated at the lowest possible voltage, 1.5 V, with a CMOS memory array, using PC material with the lowest RESET current. We discuss the margins for reset/set/read operations based on measurement results and identified that it is impossible to distinguish between reset/set operations by controlling the bit-line voltage. We propose a new tri-level voltage word-line control (3LV-WL) scheme to clearly operate set operations. Moreover, we investigated the read disturb operation and developed a new reduced-actual-read-access (RA2) scheme to attain 500 times the read retention time. We also developed a source line control (SLC) scheme to attain an 18% smaller cell size and a 19-F/sup 2/ memory cell with enough reset current to clearly reset the PC material. With the application of these approaches, we established reset/set/read operations with the lowest possible voltage, 1.5 V with logic CMOS, for a low-cost embedded memory with a few additional masks.

Ta2O5 Interfacial Layer between GST and W Plug enabling Low Power Operation of Phase Change Memories

A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., current and voltage) for the cell is significantly reduced by inserting a very thin Ta2O5 film between GeSbTe (GST) and a W plug. The Ta2O5 interfacial layer works not only as a heat insulator enabling effective heat generation in GST but also as an adhesion layer between GST and SiO2 underneath. Nonetheless, sufficient current flows through the interfacial layer due to direct tunneling. A low programming power of 1.5 V/100 muA can therefore be obtained even on a W plug with a diameter of 180 nm fabricated using standard 0.13-mum CMOS technology. In addition, the uniformity and repeatability of cell resistance are excellent because of the inherently stable Ta2O5 film properties

Doped In-Ge-Te Phase Change Memory Featuring Stable Operation and Good Data Retention

We have fabricated a phase change memory using doped In-Ge-Te to improve the data retention required for industrial and automotive use. This chalcogenide features higher thermal stability as well as denser texture and improved adhesion. The memory cell using doped In-Ge-Te provided a larger read margin and better data retention than conventional Ge2Sb2Tes, and we demonstrated 10-year retention at temperatures above 150degC, which is the highest temperature ever reported.

Oxygen-doped gesbte phase-change memory cells featuring 1.5 V/100-/spl mu/A standard 0.13/spl mu/m CMOS operations

We demonstrated the operation of phase-change memory cells that enabled 1.5-V/100-muA programming through a tungsten-bottom-electrode contact with a diameter of 180 nm. This is the lowest power ever reported. This was achieved with oxygen-doped GeSbTe, and resulted from the high electric resistance of the germanium oxides in this material. Germanium oxides were also estimated to restrain the growth of crystal in GeSbTe, and our cells maintained a 10-year thermal lifetime at 100 degC

A 1-V, 100-MHz, 10-mW cache using a separated bit-line memory hierarchy architecture and domino tag comparators

A 1-V 16-KB (L2) 2-KB (L1) four-way set-associative cache was fabricated using a 0.25-/spl mu/m CMOS technology for future low-power high-speed microprocessors. Effective latency of 6.9 ns and power consumption of 10 mW at 100 MHz are obtained at a supply voltage of 1 V. This performance is achieved by using a new separated bit-line memory hierarchy architecture (SBMHA) that speeds up latency and reduces power consumption, and domino tag comparators (DTCs) that reduce the power dissipation of tag comparisons.

Determination of valence of copper and oxygen deficiency in superconducting SrxLa2−xCuO4−y

We report the analytical results of Cu valence and the amount of oxygen deficiency in high Tc superconductors, SrxLa2-xCuO4-y. These results show that for the sample with x=0, the valence state of all Cu ion is proved to be Cu2+. Amount of Cu3+ and oxygen deficiency linearly increase with increasing Sr. According to this, there is no clear correlation between the transition temperature and the oxygen deficiency.

Composition dependence of the high temperature superconductivity in (Ba, Sr)-La-(Hg, Ag)-Cu-O system with K2NiF4-type structure

High Tc superconductor M-La-Cu-O systems (M=Ba, Sr), with the composition (MxLa1-x)2CuO4-y, have been prepared by a ceramic technique and the compositional change of Tc-value have been examined. Then in each of systems the partial substitution of Ag or Hg for Cu brought the increase of Tc-value.

A 1 V 100 MHz 10 mW cache using separated bit-line memory hierarchy and domino tag comparators

This cache operates at 10 mW, and 100 MHz at 1 V supply using separated bit-line memory hierarchy architecture (SBMHA) that reduces latency and power, and domino tag comparators (DTCs) that reduce dissipation of tag comparisons. On-chip caches in low-power microprocessors need high bit-ratio to reduce power. Higher bit-ratio is achieved using a larger cache. But this has the drawback of longer latency. The SBMHA hides the long latency.

Superconductivity of Sr-La-Cu Oxides Prepared by Coprecipitation Method

Superconducting properties in Sr-La-Cu-O system prepared by the coprecipitation method were studied. The highest Tc of the samples was about 42 K, rather higher than that of the samples by a solid-state reaction. It was found that the composition (especially that of Sr) of the sintered samples was different from the nominal formation.