Olivier Brousse

A Bio-Inspired Agent Framework for Hardware Accelerated Distributed Pervasive Applications

This paper describes an agent oriented framework supporting bio-inspired mechanisms which takes profit of the intrinsic hardware parallelism of the pervasive platform developed within the Perplexus IST European project. The proposed framework is a flexible and modular means to describe and simulate complex phenomena such as biologically plausible neural networks or culture dissemination. Associated to this framework and based on the multiprocessor architecture of the Perplexus platform nodes, a tool suite capable of accelerating parallelizable agents is described. Therefore, this contribution combines the software flexibility of agent-based programming with the efficiency of multiprocessor hardware execution. This framework has been successfully tested with two experiments: a proof of concept application made of robots that autonomously improve their behaviours according to their environment and a spiking neural network simulation. These results prove that the framework and its associated methodology are relevant in the context of the simulation of complex phenomena.

NeuroDSP Accelerator for Face Detection Application

Neuro-Inspired Vision approach, based on models from biology, allows to reduce the computational complexity. One of these models - The Hmax model - shows that the recognition of an object in the visual cortex mobilizes V1, V2 and V4 areas. From the computational point of view, V1 corresponds to the area of the directional filters (for example Gabor filters or wavelet filters). This information is then processed in the area V2 in order to obtain local maxima. This new information is then sent to an artificial neural network. This neural processing module corresponds to area V4 of the visual cortex and is intended to categorize objects present in the scene. In order to realize autonomous vision systems (low-power consumption) with such treatments inside, we studied a new architeure of a Neural Processor named NeuroDSP. We describe in this paper an optimized Hmax model implementation on this Neural Processor for a face detection application.

Neuro-inspired learning of low-level image processing tasks for implementation based on nano-devices

As nanoscale devices such as OG-CNTFETs are under studies and may be used in a near futur, we choose to investigate in wich application domain such components may be of the most interest. In this paper we present how neural networks can be used to implement functions on nano-scale components. This method has been tested in the image processing application field.

Exploration and design of embedded systems including neural algorithms

The current trend in embedded systems is to make them surrounding the users, providing services thanks to a knowledge of their environment. These self-awareness and context-awareness properties are provided by numerous sensors, from different types. Using the provided information causes at least two problems: the fusion of data from different sources, and the noise induced by sensors which are closer from the processing unit than ever. Additionally, the needed applications that use these information are based on different recognition processings, sometimes not easy to formalize with conventional algorithms. Processing chains using neural-based algorithms are promising approaches for solving these kinds of issues. Unfortunately, embedding bio-inspired algorithms in an embedded system is not so easy since there is no exploration environment for this specific task. Moreover, neural networks often need pre- or postprocessing of data for optimal operation. In fact, there is a balance to find between pre-processing and neural network processing: for example, adding more filtering to clean or to transform data (like convolution filters or FFT) enables to have smaller neural networks, leading to less number of neurons, less learning time and finally more efficient applications. This paper presents early results of a collaboration towards the design of such an exploration environment coming from a joint laboratory between an SME and a Research Institute. The main object coming from the current collaboration is the coupling of a rich exploration environnement of embedded systems (including multi/manycore) with a neural network exploration tool. The combination of the two enables us to have feedbacks concerning both algorithm efficiency and performances and other non-functional metrics regarding the target system for driving the co-design cycle of industrial embedded systems.

Smart image sensor with adaptive correction of brightness

Today, intelligent image sensors require the integration in the focal plane (or near the focal plane) of complex algorithms for image processing. Such devices must meet the constraints related to the quality of acquired images, speed and performance of embedded processing, as well as low power consumption. To achieve these objectives, analog pre-processing are essential, on the one hand, to improve the quality of the images making them usable whatever the light conditions, and secondly, to detect regions of interest (ROIs) to limit the amount of pixels to be transmitted to a digital processor performing the high-level processing such as feature extraction for pattern recognition. To show that it is possible to implement analog pre-processing in the focal plane, we have designed and implemented in 130nm CMOS technology, a test circuit with groups of 4, 16 and 144 pixels, each incorporating analog average calculations.

JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator

This paper presents a new unified design flow developed within the Perplexus project that aims to accelerate parallelizable data-intensive applications in the context of ubiquitous computing. This contribution relies on the JubiTool: a set of integrated tools (JubiSplitter, JubiCompiler, UbiAssembler), allowing respectively to extract, compile and assemble parallelizable parts of applications described in Jubi language. Jubi is a modified Java agent based language (JADE) dedicated to the Ubichip (the bio-inspired chip developed within the confines of the Perplexus project). By appending hardware directives to a software agent description, the inherent flexibility of software is combined with the runtime performance of a hardware execution. In the case of typical Perplexus applications such as the Spiking Neural Network Simulator, this contribution takes profit of the intrinsic property of the Ubichip in terms of parallelism resulting in an expected speedup of at least one order of magnitude. Finally, this hybrid (SW/HW) flow could be easily modified and adapted to support other kind of distributed platforms.

The Jubi approach: a tool set for hardware acceleration in sensor network applications field

This paper presents a unified design flow that aims at accelerating parallelizable data-intensive applications in the context of ubiquitous computing. This contribution relies on the JubiTool: a set of integrated tools (JubiSplitter, JubiCompiler), allowing respectively to extract and compile parallelizable parts of applications described in a Java extended language called Jubi. By appending hardware directives to a software agent description, the inherent flexibility of software is combined with the runtime performance of a hardware execution. In the case of typical Perplexus applications such as a biologically plausible neural network simulator, this contribution takes profit of the intrinsic property of the Perplexus Ubichip in terms of parallelism resulting in an expected speedup of one order of magnitude. Finally, we show that this original flow allowing HW acceleration can be modified to support other types of distributed platforms.