Yoann Guillemenet

A non-volatile run-time FPGA using thermally assisted switching MRAMS

This paper describes the integration of a thermally assisted switching magnetic random access memory (TAS-MRAM) in FPGA design. The non-volatility of the latter is achieved through the use of magnetic tunneling junctions (MTJ) in the MRAM cell. A thermally assisted switching scheme is used to write data in the MTJ device, which helps to reduce power consumption during write operation in comparison to the writing scheme in classical MTJ device. Plus, the non-volatility of such a design should reduce both power consumption and configuration time required at each power up of the circuit in comparison to classical SRAM based FPGAs. A real time reconfigurable (RTR) micro-FPGA using TAS-MRAM allows dynamic reconfiguration mechanisms, while featuring simple design architecture.

Non-volatile run-time field-programmable gate arrays structures using thermally assisted switching magnetic random access memories

This study describes the integration of thermally assisted switching magnetic random access memories (TAS-MRAMs) in field-programmable gate array (FPGA) design. The non-volatility is achieved through the use of magnetic tunnelling junctions (MTJs) in an MRAM cell. A TAS scheme is used to write data in the MTJ device, which helps to reduce power consumption during a write operation in comparison with the conventional writing scheme used in MTJ devices. Furthermore, the non-volatility allows reducing both power consumption and configuration time required at each power-up of the circuit in comparison with classical static random access memory-based FPGAs. An innovative architecture furthermore provides run-time reconfigurable (RTR) support at minimum area overhead. A RTR FPGA element using TAS-MRAM allows dynamic reconfiguration mechanisms, while featuring simple design architecture.

Design of MRAM based logic circuits and its applications

As the fabrication technology node shrinks down to 90nm or below, high standby power becomes one of the major critical issues for CMOS logic circuits due to the high leakage currents. A number of non-volatile storage technologies such as FRAM, MRAM, PCRAM and RRAM and so on, are under investigation to bring the non-volatility into the logic circuits and then eliminate completely the standby power issue. Thanks to its infinite endurance, high switching/sensing speed and easy 3D integration after CMOS process, MRAM is considered as the most promising one. Numerous logic circuits based on MRAM technology have been proposed and prototyped in the last years. In this paper, we present an overview and current status of these logic circuits and their potential applications in the future.

On the use of magnetic RAMs in field-programmable gate arrays

This paper describes the integration of field-induced magnetic switching (FIMS) and thermally assisted switching (TAS) magnetic random access memories in FPGA design. The nonvolatility of the latter is achieved through the use of magnetic tunneling junctions (MTJs) in the MRAM cell. A thermally assisted switching scheme helps to reduce power consumption during write operation in comparison to the writing scheme in the FIMS-MTJ device. Moreover, the nonvolatility of such a design based on either an FIMS or a TAS writing scheme should reduce both power consumption and configuration time required at each power up of the circuit in comparison to classical SRAM-based FPGAs. A real-time reconfigurable (RTR) micro-FPGA using FIMS-MRAM or TAS-MRAM allows dynamic reconfiguration mechanisms, while featuring simple design architecture.

High Performance SoC Design Using Magnetic Logic and Memory

As the technolody node shrinks down to 90nm and below, high standby power becomes one of the major critical issues for CMOS highspeed computing circuits (e.g. logic and cache memory) due to the high leakage currents. A number of non-volatile storage technologies, such as FRAM, MRAM, PCRAM and RRAM, are under investigation to bring the non-volatility into the logic circuits and then eliminate completely the standby power issue. Thanks to its infinite endurance, high switching/sensing speed and easy integration on top of CMOS process, MRAM is considered as the most promising one. Numerous logic circuits based on MRAM technology have been proposed and prototyped in the last years. In this paper, we present an overview and current status of these logic circuits and discuss their potential applications in the future from both physical and architectural points of view.

Embedded MRAM for high-speed computing

As the fabrication technology node shrinks down to 90nm or below, high standby power becomes one of the major critical issues for CMOS high-speed computing circuits (e.g. logic and cache memory) due to the high leakage currents. A number of non-volatile storage technologies such as FeRAM, MRAM, PCRAM and RRAM and so on, are under investigation to bring the non-volatility into the logic circuits and then eliminate completely the standby power issue. Thanks to its infinite endurance, high switching/sensing speed and easy 3D integration after CMOS process, MRAM is considered as the most promising one. Numerous logic circuits based on MRAM technology have been proposed and prototyped in the last years. In this paper, we present an overview and current status of these logic circuits and discuss their potential applications in the future from both the physics and architecture points of view.

Evaluation of hybrid MRAM/CMOS cells for reconfigurable computing

The main objective of this paper is to give an overview of different hybrid MRAM/CMOS cells to use in the context of reconfigurable computing. The way to convert magnetic information into an electrical one is not unique and we propose to compare different kind of hybrid cells. These hybrid cells can be used to define structures as Look-up Table, configuration memory point, Flip-flop and other basic elements needed to define programmable logic. Even if these cells were designed for the TAS (Thermally Assisted Switching) MRAM technology, it is possible to adapt them to more advanced technologies such as STT (Spin Transfer Torque).

MRAM Based eFPGAs: Programming and Silicon Flows, Exploration Environments, MRAM Current State in Industry and Its Unique Potentials for FPGAs

The need of non volatility along with the added flexibility of un limited reprogramming like SRAM has lead to the concept of universal memories. MRAM (Magnetoresistive Random Access Memory) is one prominent member of them. At present only Flash is providing a limited bridge for that. Flash based FPGAs have several benefits being non volatile but unfortunately also loose many of the features which are only possible with SRAM based FPGAs. MRAMs have potential to bridge this gap. This paper will present a brief survey of our work in this regard for creating the entire eco system of software and hardware tool flows, MRAM layout work at 120nm, exploration environments to conduct complex experiments especially Dynamic Reconfiguration and Multi Context FPGAs. MRAM opens new opportunities for them compared to SRAM and Flash. It will discuss the current status of MRAM in industry and our current and future test chips road maps. Provide several references to industry and our published work for details about MRAMs and eFPGAs, to show why we think MRAM can be very interesting element for FPGAs.

Ultra compact non-volatile flip-flop for low power digital circuits based on hybrid CMOS/magnetic technology

Complex systems are mainly integrated in CMOS technology, facing issues in advanced process nodes, in particular for power consumption and heat dissipation. Magnetic devices such as Magnetic Tunnel Junction (MTJ) have specific features: non-volatility, high cyclability (over 1016) and immunity to radiations. Combined with CMOS devices they offer specific and new features to designs. Indeed, the emerging hybrid CMOS/Magnetic process allows integrating magnetic devices within digital circuits, modifying the current architectures, in order to contribute to solve the CMOS process issues. We present a high performance innovative non-volatile latch integrated into a flipflop which can operate at high speed. It can be used to design non-volatile logic circuits with ultra low-power consumption and new functionalities such as instant startup. This new flip-flop is integrated as a standard cell in a full Magnetic Process Design Kit (MPDK) allowing full custom and digital design of hybrid CMOS/Magnetic circuits using standard design tools.

Improving the Reliability of a FPGA Using Fault-Tolerance Mechanism Based on Magnetic Memory (MRAM)

The current SRAM based FPGA, are more and more susceptible to Single Event Upset (SEU) due to Neutron particle interference. The problem is exasperated reducing the CMOS submicronic scale in the manufacturing process, specially for the next generation of SRAM-based FPGAs. Nowadays is common practice for SRAM manufactories to embed fault tolerant mechanisms like Error-Correcting Code schemes in SRAM memory banks for CMOS technology below 90nm, to mitigate SEU. The present work proposes an approach to improve the reliability of the FPGAs, regarding SEU events at ground level for the future submicronic scale technologies proposing the adoption of Magnetic Random Access Memories (MRAMs) cells into a simple fault-tolerant system for FPGAs manufactured below 65nm submicronic scale.