Oz Levia

Object-Oriented Modeling

From the Publisher: Object-Oriented Modeling explores the latest techniques in object oriented methods, formalisms and hardware description language extensions. The seven chapters comprising this book provide an overview of the latest object-oriented techniques for designing systems and hardware. Many examples are given in C++, VHDL and real-time programming languages. Object-Oriented Modeling describes further the use of object-oriented techniques in applications such as embedded systems, telecommunications and real-time systems, using the very latest techniques in object-oriented modeling. It is an essential guide to researchers, practitioners and students involved in software, hardware and system design.

Modeling in Analog Design

1. VHDL-A Design Objectives and Rationale. 2. Modeling in VHDL-A: Devices, Networks and Systems. 3. Analog Modeling Using MHDL. 4. Modeling and Simulation of Electrical and Thermal Interaction. 5. Modeling of Power MOSFET. Index.

Models in System Design

From the Publisher: Models in System Design tracks the general trend in electronics in terms of size, complexity and difficulty of maintenance. System design is by nature combined with prototyping, mixed domain design, and verification, and it is no surprise that todays modeling & models are used in various levels of system design and verification. In order to deal with constraints induced by volume and complexity, new methods and techniques have been defined. Models in System Design provides an overview of the latest modeling techniques for use by system designers. Models in System Design will help designers and researchers to understand these latest techniques in system design and as such will be of interest to all involved in embedded system design.

Lessons in Language Design: Cost/Benefit Analysis of VHDL Features

This paper looks at the design of one successful hardware description language, VHSIC Hardware Description Language (VHDL) with a critical evaluation of particular language features. In the paper we identify features of VHDL that burden the language in terms of development time (i.e. price), performance of the implementation, and user-friendliness. We suggest a useful and instinctive tool to assess the redundancy of language features. We also give an explanation as to why such superfluous features are included in VHDL. While it is quite obvious that the restandardization process is not designed to remove features from VHDL, it is interesting, at the end of a major language redesign process, to draw lessons that can benefit language designers, implementors, and users.

The future of system design languages (panel session)

Verilog HDL was a breakthrough for the hardware design community in 1986. Over the years, the methodology based on the Verilog HDL has been extended with utilities and enhancements. With 0.25- and 0.18 µ processes enabling a system to be packed onto a single integrated circuit (IC), design problems have surfaced that no one could have predicted 13 years ago. As a result, several new design language proposals have been introduced since the last Design Automation Conference (DAC), all claiming to aid system-on-chip (SOC) design. Several claim to improve the designers ability to efficiently create, implement, and verify SOC designs from architectural specification through functional implementation. The panel, comprised of experienced designers and representatives of organizations submitting design language proposals, will debate the various proposals and will try to identify what future trend will accelerate system design. Questions and issues to be considered include:Whats in store for the future — C, Java, Superlog, HDL or SLDL? A comparison of modeling, gate-level and behavioral simulation capabilities of a new design language to current languages/tools/methods A comparison of the software development capabilities of a new design language to current languages/tools/methods A review of the projected design environment of a new design language to current languages/tools/methods.

Hardware Component Modeling

From the Publisher: Hardware Component Modeling highlights the current state in the modeling of electronic components. It includes contributions from many of the leading researchers and practitioners in the field. The contents focus on four important topics. Standards: Three chapters describe the current development in employing standards for the use of component libraries. A major part of these chapters provide an excellent introduction to VITAL (an IEEE standard), its application and some of the issues in using and implementing it. There are, however, other standards with a role to play and these are also covered. Data Types: A chapter describes the latest techniques for using data types in modeling and simulation. Model Generation: One chapter describes a model generator for reusable component models and another describes a generator which takes actual physical data as its source and generates a functional model. Quality Assurance: Two chapters are devoted to improving the quality of models. One introduces a method for quantifying aspects of model quality and other introduces quality concepts which can lead to an increase in model value through reuse and robustness.

Model Generation in Electronic Design

From the Publisher: Model Generation in Electronic Design describes many of the activities currently taking place in the electronic modeling domain. This volume covers a wide-range of model application, research use and disciplines all of which will be of interest to users, vendors, model producers and researchers. Model Generation in Electronic Design begins by describing a model generator to create component models. After this introduction the volume focuses on ASIC design and ASIC library generation. This includes chapters on the requirements for developing an ASIC library, a case study of using VITAL to create an ASIC library and the analysis and description of the accuracy required in modeling interconnections in ASIC design. Other chapters describe the development of thermal models for electronic devices, the development of a set of model packages for VHDL floating point operations, a technique for model validation and verification and a tool for model encryption. Model Generation in Electronic Design is the essential update for technical managers, designers, and researchers working in electronic design.