P. A. Ramamoorthy
University of Cincinnati
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Featured researches published by P. A. Ramamoorthy.
IEEE Transactions on Biomedical Engineering | 1986
Vijay K. Iyer; P. A. Ramamoorthy; Hohg Fan; Yongyudh Ploysongsang
Auscultation of the chest is an attractive diagnostic method used by physicians, owing to its simplicity and noninvasiveness. Hence, there is interest in lung sound analysis using time and frequency domain techniques to increase its usefulness in diagnosis. The sounds recorded or heard are, however, contaminated by incessant heart sounds which interfere in the diagnosis based on, and analysis of, lung sounds. A common method to minimize the effect of heart sounds is to filter the sound with linear high-pass filters which, however, also eliminates the overlapping spectrum of breath sounds. In this work we show how adaptive filtering can be used to reduce heart sounds without significantly affecting breath sounds. The technique is found to reduce the heart sounds by 50¿80 percent.
IEEE Transactions on Biomedical Engineering | 1989
Vijay K. Iyer; P. A. Ramamoorthy; Yongyudh Ploysongsang
The source of lung sounds in the airway is modeled as a white noise source consisting of one or a combination of the following sources: random white noise sequence, periodic train of impulses, and impulsive bursts of energy. Acoustic transmission through the lung parenchyma and chest wall is modeled as an all-pole filter. Using this method, the source and transmission characteristics of lung sounds are estimated separately, based on the lung sounds at the chest wall. To illustrate the potential validity of the model, lung sound segments in known disease conditions were selected from teaching tapes and the source and transmission characteristics were estimated by applying the model. The estimated characteristics were found to be consistent with current knowledge of the generation and transmission of lung sounds in the known conditions.<<ETX>>
IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 1994
Phillip E. Pace; P. A. Ramamoorthy; D. Styer
High performance analog-to-digital converters (ADCs) employ a parallel configuration of analog folding circuits to symmetrically fold the input signal prior to quantization by high speed comparators (analog preprocessing). This paper identifies a new preprocessing approach that can be easily incorporated into the established techniques to provide an enhanced resolution capability with fewer number of comparators loaded in parallel. The approach is based on preprocessing the analog signal with a symmetrical number system (SNS). The SNS preprocessing is used to decompose the analog amplitude analyzer operation into a number of sub-operations (moduli) which are of smaller computational complexity. Each sub-operation symmetrically folds the analog signal with folding period equal to the moduli. Thus, each sub-operation only requires a precision in accordance with that modulus. A much higher resolution is achieved after the N different SNS moduli are used and the results of these low precision sub-operations are recombined. By incorporating the SNS folding concept, the dynamic range of a specific configuration of folding periods and comparator arrangements can be analyzed exactly. >
international conference on systems engineering | 1990
G. Govind; P. A. Ramamoorthy
The similarities and differences between the conventional Volterra series techniques and the neural network approach are discussed. The analysis is done from the point of view of representation capabilities for nonlinear systems, and it is shown that a small neural network can represent high-order nonlinear systems, whereas a very large number of terms are required for an equivalent Volterra series representation. This is shown by means of a series expansion of a neural network. Issues common to the two nonlinear modeling approaches are analyzed
international conference on acoustics, speech, and signal processing | 1987
P. A. Ramamoorthy; B. Potu
The implementation of real-time image encoding requires a high and constant throughput rate not achievable by a SISD machine. With a reasonable size codebook and SIMD machine architecture. Vector Quantization algorithm can be implemented in real-time. But, single stage Vector Quantization requires fairly large-size codebook for good quality image encoding. Multi-Stage Vector Quantization with codebooks of moderate size at each stage has been shown to be an alternative viable approach. The bits per pixel rates for TV quality composite color image encoding using Multi-Stage Vector Quantization are reported. The VQ/MSVQ implementation requires two processors, inner product processor and comparator-address generator. The implementation details of the processors and their throughput rate are described.
international conference on acoustics, speech, and signal processing | 1987
P. A. Ramamoorthy; V. Iyer; Y. Ploysongsang
Autoregressive(AR) or linear predictive(LP) modeling and Wigner time-frequency representations have been proposed for non-stationary signal analysis and synthesis, owing to their specific advantages over the short-time Fourier transform, viz. reduced data set characterisation and improved frequency resolution of the former, and the improved time resolution and thence better non-stationary signal representation of the latter. However, the former is limited in time resolution and the latter in frequency resolution and size of characterising data set, depending on the size of the windows that need to be used. This paper investigates the potential combination of the two above methods, with the aim of exploiting their advantages simultaneously and addressing the window size-resolution dilemma. The concept shows good promise to this end, despite the problems of the cross-spectral components and computational complexity, that need to be addressed. Examples of simulated signals are presented to illustrate the advantages of this representation.
Optical Engineering | 1987
P. A. Ramamoorthy; S. Antony
The design of a processor can vary considerably with the type of technology (optical or electronic, analog or digital), the number system, and the coding scheme used for the number representation. Binary number representation is accepted as the best suited for electronic computers. However, the delay due to carry propagation in binary arithmetic makes the binary number representation a very weak candidate for an optical processor that is inherently parallel. The modified signed digit (MSD) number representation satisfies the requirements of totally parallel addition using modular or identical units and allows the addition of any two numbers in three successive steps. In this paper, we show the design of a parallel optical adder based on MSD number representation using the method of symbolic substitution originally proposed by Karl-Heinz Brenner [Appl. Opt. 25(18), 3061-3064 (1986)] and Alan Huang [Proc. IEEE Int. Optical Computing Conf., pp. 13-17 (1983)]. Polarized light is used to code the inputs and outputs. We also discuss the use of this adder along with barrel shifters to efficiently implement multiplication.
Journal of Biomedical Engineering | 1989
Vijay K. Iyer; P. A. Ramamoorthy; Yongyudh Ploysongsang
An index to quantify the contamination of lung sounds by heart sounds is described. Using the index, the efficacy of high pass filtering and adaptive filtering methods for the reduction of heart sounds is evaluated.
Neural Networks | 1988
P. A. Ramamoorthy; G. Govind; V.K. Iyer
Modeling (or system identification) and prediction problems are of great importance in the fields of signal processing and control systems. These enable the input/output relation of unknown systems to be modeled by a set of parameters. For stationary systems these parameters fully characterize the system and future outputs can be found using these parameters. In certain cases the plant could be noisy, in which case the solution models everything but the noise.
international symposium on neural networks | 1993
G. Govind; P. A. Ramamoorthy
Neural-based nonlinear system identification and control suffer from the problem of slow convergence. The selection of a suitable architecture for a problem is made through trial and error. There is a need for an algorithm that would provide an efficient solution to these problems. One possible solution is presented. The network is built slowly in a step-by-step fashion. This evolving architecture methodology allocates a certain number of nodes that avoid training on outliers and, at the same time, provide sufficient complexity for the approximation of a data set. Through simulation examples it is shown that this algorithm also exhibits faster convergence properties than the usual multi-layered neural network algorithms.<<ETX>>