P. Crowley
Analog Devices
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Featured researches published by P. Crowley.
international solid-state circuits conference | 2009
G. Retz; Hyman Shanan; Kenneth J. Mulvaney; Shane A. O'Mahony; Miguel Chanca; P. Crowley; Charley Billon; K. Khan; Philip Quinlan
The IC presented in this paper is a highly integrated low-power RF transceiver for wireless sensor networks (WSN) compliant with the IEEE 802.15.4 2.4GHz WPAN standard. It contains a radio controller with sleep timer and can perform higher-level MAC functions such as beacon detection and network timing synchronisation autonomously, thereby enabling significant power savings in the overall system. The primary design goal for the receive path is to achieve excellent channel selectivity and dynamic range combined with good sensitivity at very low power consumption, all of which are important parameters for the reliable operation of WSN in the harsh 2.4GHz ISM band. The receiver uses a direct-conversion architecture and offers up to 20dB improved interference rejection in the adjacent channels compared to recently published WPAN transceivers based on the low-IF architecture [1,2]. Further emphasizing WSN reliability, the receiver supports switched antenna diversity to mitigate multipath fading. Implemented in a 1P6M 0.18µm RFCMOS process, the IC occupies a die area of less than 5.9mm2. It operates with a supply voltage from 1.8V to 3.6V, draws 16.8mA in receive mode and 18mA when transmitting at 3dBm.
IEEE Journal of Solid-state Circuits | 2004
Philip Quinlan; P. Crowley; Miguel Chanca; Sean Hudson; Bill Hunt; Kenneth J. Mulvaney; Guido Retz; Cormac E. O'sullivan; Patrick Walsh
A fully integrated transceiver suitable for low-data-rate wireless telemetry and sensor networks operating in the license-free ISM frequency bands at 433, 868, or 915 MHz implemented in 0.25-/spl mu/m CMOS is presented. G/FSK, ASK, and OOK modulation formats are supported at data rates from 0.3 to 200 kb/s. The transceivers analog building blocks include a low-noise amplifier, mixer, channel filter, received signal-strength indication, frequency synthesizer, voltage-controlled oscillator, and power amplifier. FSK demodulation is implemented using a novel digital complex-frequency correlator that operates over a wide modulation-index range and approximates matched filter detection performance. Automatic gain control, automatic frequency control, and symbol timing recovery loops are included on chip. Operating in the 915-MHz band in FSK mode at 9.6 kb/s, the receiver consumes 19.7 mA from a 3-V supply and achieves a sensitivity of -112.8dBm at 0.1% BER. The transmitter consumes 28.5 mA for an output power of 10 dBm and delivers up to 14 dBm.
international solid-state circuits conference | 1995
P. Minogue; P. Weeks; J. Morrissey; S. Patterson; P. Crowley; H. Tucholski; Dennis A. Dempsey; D. Hitchcox; P. Shepherd; P. Sheridan; A.J. Kelly; P. Heraty; C. McAuliffe; Mike Keaveney; M. O'Connor; P. Dillon; A.L. Kelly; G. Coffey; M. McCarthy; P. Costigan
Designed to satisfy the data conversion requirements of the Pan-European (GSM) cellular radio system, the chip is part of a four chip-set total GSM solution comprising the codec, the DSP, the digital ASIC, and the micro-controller. Fabricated in a 0.8 /spl mu/m double-poly, double-metal CMOS process, the integrated circuit combines a voiceband codec with a baseband codec plus auxiliary converters in an 80-pin TQFP package while running off a single 3 V power supply.
international solid-state circuits conference | 2004
Philip Quinlan; P. Crowley; Miguel Chanca; Sean Hudson; Bill Hunt; Kenneth J. Mulvaney; Guido Retz; Cormac E. O'sullivan; Patrick Walsh
A fully integrated ISM-band transceiver in 0.25/spl mu/m CMOS for low data-rate wireless networks consumes 17mA from a 3V supply in FIX mode. At +10dBm output power, the part consumes 24mA. G/FSK and OOK/ASK modulation formats are supported at data rates from 0.3-128kb/s in the 433/868/915MHz ISM bands.
international symposium on circuits and systems | 2017
Giuseppe Macera; P. Crowley
The majority of analog and digital integrated circuits with built in crystal oscillator use the Gated Pierce design where the oscillator is built around a single CMOS inverting gate. In most applications that require a high level of precision and stability of the performances versus Process, Voltage and Temperature (PVT) variations, this design is not suitable. The inverter cell itself is very sensitive to PVT variations, negatively affecting the overall performances of a crystal oscillator. This paper shows a new Pierce-Gate crystal oscillator based on the constant gm cell, implemented in 28nm CMOS TSMC technology. The oscillator can work with any crystal frequency between 20 MHz and 100 MHz, the power supply is 1.8V and the output is a 50% duty cycle square waveform. Simulations and measurements show that the new designed crystal oscillator is superior in terms of phase noise performances (−123 dBc/Hz at 100 Hz offset at 60 MHz and −163 dBc/Hz at 1MHz offset at 60 MHz), phase noise variation over PVT, Power Supply Rejection Ratio (PSRR), output frequency and output duty cycle stability, and input impedance with respect to the state of the art counterparts. The implemented crystal oscillator is very challenging and suitable for automotive radar applications.
Archive | 2004
Philip Quinlan; Kenneth J. Mulvaney; P. Crowley; William Hunt
Archive | 2004
Philip Quinlan; Kenneth J. Mulvaney; P. Crowley; William Hunt
Archive | 2009
Miguel Chanca; Ronan Casey; P. Crowley; Muhammad Kalimuddin Khan; Philip Quinlan
Telemetry and Telematics, 2005. The IEE Seminar on (Refl No. 2005/11009) | 2005
P. Crowley; Miguel Chanca; S. Hudson; B. Hunt; Kenneth J. Mulvaney; P. Quinlan; G. Retz; C. O'Sullivan; P. Walsh
international solid-state circuits conference | 2004
Philip Quinlan; P. Crowley; Miguel Chanca; Sean Hudson; Bill Hunt; Kenneth J. Mulvaney; Guido Retz; Cormac E. O'sullivan; Patrick Walsh