Philip Quinlan

A highly integrated low-power 2.4GHz transceiver using a direct-conversion diversity receiver in 0.18µm CMOS for IEEE802.15.4 WPAN

The IC presented in this paper is a highly integrated low-power RF transceiver for wireless sensor networks (WSN) compliant with the IEEE 802.15.4 2.4GHz WPAN standard. It contains a radio controller with sleep timer and can perform higher-level MAC functions such as beacon detection and network timing synchronisation autonomously, thereby enabling significant power savings in the overall system. The primary design goal for the receive path is to achieve excellent channel selectivity and dynamic range combined with good sensitivity at very low power consumption, all of which are important parameters for the reliable operation of WSN in the harsh 2.4GHz ISM band. The receiver uses a direct-conversion architecture and offers up to 20dB improved interference rejection in the adjacent channels compared to recently published WPAN transceivers based on the low-IF architecture [1,2]. Further emphasizing WSN reliability, the receiver supports switched antenna diversity to mitigate multipath fading. Implemented in a 1P6M 0.18µm RFCMOS process, the IC occupies a die area of less than 5.9mm2. It operates with a supply voltage from 1.8V to 3.6V, draws 16.8mA in receive mode and 18mA when transmitting at 3dBm.

A multimode 0.3-200-kb/s transceiver for the 433/868/915-MHz bands in 0.25-/spl mu/m CMOS

A fully integrated transceiver suitable for low-data-rate wireless telemetry and sensor networks operating in the license-free ISM frequency bands at 433, 868, or 915 MHz implemented in 0.25-/spl mu/m CMOS is presented. G/FSK, ASK, and OOK modulation formats are supported at data rates from 0.3 to 200 kb/s. The transceivers analog building blocks include a low-noise amplifier, mixer, channel filter, received signal-strength indication, frequency synthesizer, voltage-controlled oscillator, and power amplifier. FSK demodulation is implemented using a novel digital complex-frequency correlator that operates over a wide modulation-index range and approximates matched filter detection performance. Automatic gain control, automatic frequency control, and symbol timing recovery loops are included on chip. Operating in the 915-MHz band in FSK mode at 9.6 kb/s, the receiver consumes 19.7 mA from a 3-V supply and achieves a sensitivity of -112.8dBm at 0.1% BER. The transmitter consumes 28.5 mA for an output power of 10 dBm and delivers up to 14 dBm.

A 5 V, 6-b, 80 Ms/s BiCMOS flash ADC

A 5 V single supply, 6-bit flash A/D converter (ADC) has been developed that supports sampling rates of up to 80 Ms/s. The converter is optimized to operate in undersampling applications where the ADC has to deliver greater than 5.2 Effective Number Of Bits (ENOBs) with input frequencies well beyond Nyquist. Excellent dynamic linearity performance has been achieved with input frequencies up to 75 MHz and a gain flatness of better than 0.1 dB is obtained over the input signal spectrum of 50 MHz-95 MHz. This ADC is fabricated on a 1.0 /spl mu/m advanced BiCMOS process that features trench-isolated bipolar devices with an f/sub t/ of 10 GHz. >

A 2.4GHz 2Mb/s versatile PLL-based transmitter using digital pre-emphasis and auto calibration in 0.18µm CMOS for WPAN

A fully integrated 2.4GHz 2Mb/s transmitter which is part of a highly integrated WPAN RF transceiver SoC using a 0.18µm RFCMOS 1P6M process is presented. The transmitter uses a ΔΣ fractional-N PLL architecture. It transmits 2Mb/s GFSK and GMSK modulated signals and is compliant with the IEEE802.15.4 and Bluetooth 1.2 standards. The transmitter consumes 18mA at 3dBm output power and occupies 1.1mm2. The transmitter does not use any quantisation noise cancellation techniques leading to 60% die area and 50% power consumption savings compared to [1,2], yet meets the FCC emission regulations in restricted bands with 12dB margin. It uses a novel calibration system that maintains a worst-case RMS phase error of 8.4° for 2Mb/s GMSK in the presence of ±50% variation in the PLL closed-loop bandwidth (CLBW). The calibration system consumes 0.4mA for a period of 66µs, which is significantly less power-consuming than a recently reported scheme [3].

A multi-mode 0.3-128kb/s transceiver for the 433/868/915MHz ISM bands in 0.25/spl mu/m CMOS

A fully integrated ISM-band transceiver in 0.25/spl mu/m CMOS for low data-rate wireless networks consumes 17mA from a 3V supply in FIX mode. At +10dBm output power, the part consumes 24mA. G/FSK and OOK/ASK modulation formats are supported at data rates from 0.3-128kb/s in the 433/868/915MHz ISM bands.

26.4 A 160-to-960MHz ETSI class-1-compliant IoE transceiver with 100dB blocker rejection, 70dB ACR and 800pA standby current

The Internet of Everything (IoE) is a macro trend that is presently disrupting the global electronic industry. Tremendous growth is forecast in the areas of sensing, measurement and the interpretation of data, before transferring to the Cloud for analysis. This exponential increase in wireless-sensor traffic, coupled with increasingly harsh environments in which sensor networks operate around the globe, is driving the need for a new class of wireless transceivers that can offer a significant improvement in key performance metrics such as co-existence, radio-frequency (RF) emissions, link-margin and interference resilience, while also maximizing battery lifetime. Moreover, the multiplicity of use-cases and modes of operation called out in wireless connectivity standards such as IEEE 802.15.4g, WMBUS (Modes N/S/T/C/F/R), and in many proprietary connectivity standards is demanding more highly integrated system solutions.