P. Kumbhare

Self-Heating During submicrosecond Current Transients in Pr 0.7 Ca 0.3 MnO 3 -Based RRAM

In filamentary RRAM, the role of self-heating in set/reset (by ion transport) is well established. However, in nonfilamentary Pr0.7Ca0.3MnO3 (PCMO) RRAM, self-heating during set/reset has not been explored. Recently, we have shown self-heating to explain nonlinearity in dc IV characteristics. In this paper, we present the observation of self-heating using transient current during pulses. We show that the cooling timescale is limited by measurement system timescale (~30 ns). The self-heating-based experimental current transient timescale is longer (50-100 ns) and is not described by simple exponential decay. To explain this behavior, self-heating in PCMO RRAM (where Joule heating and current increase create a positive feedback) is implemented into technology computer aided design simulations. Simulations produce excellent agreement with experiments. Eventually, simulations deviate from experiments when thermally assisted ionic transport during set/reset is not included in the model. To interrupt the continuous self-heating, an n-pulse-train with cooling time between pulses versus single pulse-based set/reset experiment was designed with the same peak bias time. Set/reset effectiveness degrades as n increases while effect of increasing cooling time confirmed a cooling timescale of ~30 ns. Overall, self-heating provides a consistent explanation of the transient currents. Thus, this paper establishes that self-heating considerations must be included for PCMO-based RRAM modeling and design.

Materials parameter extraction using analytical models in PCMO based RRAM

In this paper, we have present analytical models based extraction of materials parameters for PCMO based RRAM. Based on a trap-SCLC model, the energy and spatial distribution of trap-density is extracted. A single-level trap energy is estimated. The uniform trap density model provides consistent trap density estimated from low bias Ohmic regime as well as high-bias Trap-Filled Limit regime.

A selectorless RRAM with record memory window and nonlinearity based on trap filled limit mechanism

Implementation of a crossbar array of selectorless resistive random access memory (RRAM) devices requires a high nonlinearity (NL) in low resistance state (LRS) currents to avoid the sneak path leakages. In this work, a process dependent nonlinearity in the low resistance state of Pr0.7Ca0.3MnO3 (PCMO) based RRAM devices is studied. We present a device with a record high NL of ~95.5 in LRS currents (Ilrs) along with a memory window (MW) of ~164. We report a very high slope of ~16 mV/dec in the nonlinear region of ILRS. Further, we extract the material parameter like trap level, trap density etc. using previously developed space charge limited current (SCLC) based analytical model.

PCMO-Based RRAM and NPN Bipolar Selector as Synapse for Energy Efficient STDP

Resistance random access memories (RRAMs) are widely explored to show spike time dependent plasticity (STDP) as a learning rule to show biological synaptic behavior, as these devices possess analog conductance change. To implement STDP, pre- and post-neuronal waveforms are superposed. Only the peak voltage changes the conductance of memory. But due to the remaining part of the waveform (which don’t affect the conductance change), there is a significant amount of inadvertent current flow leading to unnecessary energy consumption. In this letter, we experimentally demonstrate that, the PCMO-based RRAM, a memristor (1M) in series with the NPN selector can be used as a synapse to reduce the undesirable energy consumption. First, we propose the pre- and post-neuronal waveform engineering required for PCMO-based memristor + Selector (1S1M) to reduce energy consumption. Second, we demonstrate experimentally that 1S1M synapse gives

Effect of thermal resistance and scaling on dc-IV characteristics of PCMO based RRAM devices

> \mathsf {4700} \times

Pr 1−x Ca x MnO 3 based selector, RRAM and self-selecting selectorless RRAM: A composition study

reduction in energy consumption compared with 1M synapse for a single neuronal waveform. Third, we implement and compare anti-STDP for 1M and 1S1M synapse to show no loss of generality. Thus, we experimentally demonstrate 1S1M-based energy efficient synapse for brain inspired computing.

Effect of Morphological Change on Unipolar and Bipolar Switching Characteristics in Pr 0.7 Ca 0.3 MnO 3 Based RRAM

Ionic transport is accelerated by both electric field and temperature [1]. The role of Joule heating in filamentary RRAM devices is well explored [2]. However, Joule heating in non-filamentary RRAM has recently been explored. First, GeSbTe (GST)/PCMO stack showed improved performance, which was phenomenologically explained by proposing the role of GST as a heater element [3]. Recently, our group has proposed self-heating (i.e. heat generated within PCMO) to explain experimental DC [4] and transient [5] IV characteristics supported by quantitative TCAD studies. In this paper, we experimentally study the effect of thermal engineering on the switching characteristics of PCMO based RRAM devices. We modify the thermal resistance of the stack by using different SiO2 thicknesses (Fig. 1). Firstly, we present the effect of different SiO2 thicknesses and device area on the peak device temperature by using MATLAB PDE solver. Secondly, we fabricate devices of various areas on two different SiO2 thicknesses to study the effect on device temperature due to different thermal resistance on the switching characteristics. The qualitative agreement between experiment and thermal simulations indicates the importance of thermal engineering considerations for PCMO RRAM device performance.

A Comprehensive Study of Effect of Composition on Resistive Switching of Hf x Al 1-x O y based RRAM devices by Combinatorial Sputtering

Complex metal oxide (CMO) e.g. Pr1-xCaxMnO3 (PCMO) based resistance random access memories (RRAM) are non-filamentary which leads to forming-less operation, low variability and area scalability of current [1]. However, both CMO and TMO based RRAM show poor nonlinearity. Hence, various nonlinear selector devices (e.g. oxide based selectors [2]) have been explored. Alternatively, selectorless RRAM that incorporate nonlinearity into RRAM stack by using extra tunnel oxide layers have been demonstrated [3]. Recently, we have demonstrated PCMO based selectorless RRAM that incorporates nonlinearity in the same material - without using extra oxide layers [4]. In this context, the engineering of nonlinearity and memory window in an RRAM device remains a challenge. For example, engineering an oxide based memory (high hysteresis, poor nonlinearity) to produce selector-less memory (hysteresis + non-linearity) and then finally a selector (no hysteresis but high non-linearity) would be an interesting capability. In this paper, we demonstrate such a transition in the Pr1-xCaxMnO3 system by composition engineering.