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Dive into the research topics where Paul M. Radmore is active.

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Featured researches published by Paul M. Radmore.


IEEE Transactions on Circuits and Systems | 2006

Symbolic Framework for Linear Active Circuits Based on Port Equivalence Using Limit Variables

D.G. Haigh; Thomas J. W. Clarke; Paul M. Radmore

This paper proposes a new framework for linear active circuits that can encompass both circuit analysis and synthesis. The framework is based on a definition of port equivalence for admittance matrices. This is extended to cover circuits with ideal active elements through the introduction of a special type of limit-variable called the infinity-variable (infin-variable). A theorem is developed for matrices containing infin-variables that may be utilized in both circuit analysis and synthesis. The notation developed in this framework can describe nonideal elements as well as ideal elements and therefore the framework encompasses systematic circuit modeling


IEEE Transactions on Circuits and Systems | 2006

Admittance Matrix Models for the Nullor Using Limit Variables and Their Application to Circuit Design

D.G. Haigh; Paul M. Radmore

A framework for symbolic analysis and synthesis of linear active circuits has previously been proposed which is based on the use of admittance matrices and infinity-variables. The notation has the important advantage that it can describe both ideal circuit elements, for which an infinite limit is implied, and nonideal circuit elements for which matrix elements are considered finite. The nullor is a very important circuit element because it can represent the ideal operational amplifier and the ideal transistor. For the nonideal case, the use of finite matrix elements implies that the operational amplifier and transistor are both modelled as a voltage-controlled current source, which is fine if the transistor is a field effect transistor or if the operational amplifier is of the transconductance type, but not otherwise. The purpose of this paper is to apply the infin-variable framework in order to derive alternative models for the nullor that can be used to model voltage, current and transresistance operational amplifiers and bipolar junction transistors. We also show that the infin-variable description of an ideal transistor can include a factor to represent transistor geometry


international symposium on circuits and systems | 2004

Systematic synthesis method for analogue circuits. Part I. Notation and synthesis toolbox

D.G. Haigh; Paul M. Radmore

This paper and its companion papers (subtitles Part II and Part III) together present a systematic synthesis method for analogue circuits. This paper presents an admittance matrix representation for the ideal nullor, the conversion of transmission matrices of useful circuit functions to admittance matrix form and a number of transformations needed for synthesis. The other papers illustrate the synthesis method through examples.


IEEE Transactions on Circuits and Systems I-regular Papers | 2008

A New Mechanism Producing Discrete Spurious Components in Fractional-

Pv Brennan; Hongyu Wang; Dai Jiang; Paul M. Radmore

Fractional- frequency synthesizers have long been known to suffer from a set of spurious components, often referred to as fractional spurs, which are usually attributed to the operation of the modulator. This paper proposes a new phenomenon-based on cross-coupling and sampling of the nonharmonically related signals present in such synthesizers-which is capable of producing a family of spurious components of identical form to fractional spurs, with support from a range of analytic, simulated and measured results. A unique experimental arrangement is described, allowing controlled cross-coupling of signals within a synthesizer, which provides convincing experimental validation of this mechanism. Finally, techniques are suggested to allow at least partial mitigation of the effect.


international symposium on circuits and systems | 1992

N

D.G. Haigh; Paul M. Radmore; Anthony E. Parker

Discusses the synthesis of linearized conductance functions using GaAs MESFETs which have an approximately square-law drain current versus gate-source voltage characteristic. The functions for realization are derived and implemented in three basic circuit configurations: transconductance, self-conductance, and buffer function. The new circuits outperformed previous circuits in terms of chip area, power consumption, and efficiency. The alternative concept of voltage linearization is introduced. It was used to realize lossless buffer circuits. Optimization of FET gate widths to allow a verified realistic FET model was demonstrated.<<ETX>>


international symposium on circuits and systems | 2005

Frequency Synthesizers

D.G. Haigh; Paul M. Radmore

Active-RC circuits with prescribed voltage or current transfer functions are synthesised, starting with the transfer function in symbolic form and making no assumptions about circuit topology. The approach is based on a method of admittance matrix expansion proposed for passive-RC circuits (Haigh, D.G., ibid., p.244-7). The approach relies on the use of linked infinity parameters to describe both nullors in the nodal admittance matrix of a synthesised circuit and port admittance matrices exhibiting the prescribed voltage or current transfer functions.


european conference on circuit theory and design | 2005

Advances in linearised GaAs MESFET circuit design techniques

D.G. Haigh; Paul M. Radmore

The nullor is a circuit element which can represent ideal active devices. Recently, a way of representing the nullor in a nodal admittance matrix has been proposed using linked infinity parameters and this has led to a method of symbolic synthesis for active circuits. Replacement of linked infinity parameters by finite parameters corresponds to replacing each nullor by a finite transconductance element. In this paper, we derive alternative admittance matrix representations for the nullor which in the non-ideal case can represent a range of practical active elements, including voltage and current amplifiers and BJTs. We also show that it is possible to associated scaling parameter representing transistor geometry with the admittance matrix representation of a nullor.


international symposium on circuits and systems | 2006

Symbolic passive-RC circuit synthesis by admittance matrix expansion

D.G. Haigh; Thomas J. W. Clarke; Paul M. Radmore

Infinity-variables (infin-variables) have been used to allow symbolic description of any linear active element in an admittance matrix. This paper attempts a preliminary justification for such use of co-variables. We develop the idea of port equivalence and show that co-variables are a special case of limit-variables and can be used to imply limits in a set of matrix equations. We show that the presence of co-variables in an admittance matrix implies the existence of matrix equivalences which lead to theorems that provide a means for analysis and synthesis of active circuits


international symposium on circuits and systems | 1994

New admittance matrix descriptions for the nullor with application to circuit design

D.R. Webster; Anthony E. Parker; D.G. Haigh; Paul M. Radmore

The non-linearity demonstrated by a circuit is a function of the device nonlinearity, its parasitic components and the circuit components in which it is embedded. We demonstrate that the common source stage, which is used extensively for Device Characterisation, presents a very complex form of Device-Circuit Interaction, which makes reliable extraction of its intrinsic non-linear parameters extremely difficult. We show how pulse measurements can provide a straight forward access to parameters needed for Volterra Analysis and show the true nature of output conductance.<<ETX>>


international symposium on circuits and systems | 1993

A mathematical framework for active circuits based on port equivalence using limit variables

Carlos A. Losada; D.G. Haigh; Paul M. Radmore

The square-law relationship between the drain current and the gate-source voltage of an FET implies that a circuit comprising FETs has, in general, a nonlinear relationship between its port variables. The small-signal admittance matrix analysis technique is extended to allow systematic by-hand analysis of the linear and nonlinear behavior of FET circuits. A constraint on circuit architecture which ensures that the resulting network functions are rational is derived. Examples of analysis are given. The analysis method is a valuable tool for the development of novel circuits, both linear (e.g., amplifiers, isolators, circulators, signal splitters, and combiners) and nonlinear (e.g., multipliers and frequency doublers). It can also allow cataloging and analysis of all possible circuits of a given complexity.<<ETX>>

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D.G. Haigh

Imperial College London

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D.R. Webster

University College London

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Dai Jiang

University College London

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G.R. Ataei

University College London

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M.T. Hutabarat

University College London

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Pv Brennan

University College London

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R. Lecouls

University College London

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