Paulo Crepaldi
Universidade Federal de Itajubá
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Publication
Featured researches published by Paulo Crepaldi.
IEEE Transactions on Instrumentation and Measurement | 2012
Paulo Crepaldi; Tales Cleber Pimenta; Robson Luiz Moreno; Edgar Charry Rodríguez
This paper describes a CMOS implementation of a linear voltage regulator (LVR) used to power up implanted physiological signal systems, as it is the case of a wireless blood pressure biosensor. The topology is based on a classical structure of a linear low-dropout regulator. The circuit is powered up from an RF link, thus characterizing a passive radio frequency identification (RFID) tag. The LVR was designed to meet important features such as low power consumption and small silicon area, without the need for any external discrete components. The low power operation represents an essential condition to avoid a high-energy RF link, thus minimizing the transmitted power and therefore minimizing the thermal effects on the patients tissues. The project was implemented in a 0.35-μm CMOS process, and the prototypes were tested to validate the overall performance. The LVR output is regulated at 1 V and supplies a maximum load current of 0.5 mA at 37°C. The load regulation is 13 mV/mA, and the line regulation is 39 mV/V. The LVR total power consumption is 1.2 mW.
Computer Methods and Programs in Biomedicine | 2013
Helton Hugo de Carvalho; Robson Luiz Moreno; Tales Cleber Pimenta; Paulo Crepaldi; Evaldo Renó Faria Cintra
This article presents the viability analysis and the development of heart disease identification embedded system. It offers a time reduction on electrocardiogram - ECG signal processing by reducing the amount of data samples, without any significant loss. The goal of the developed system is the analysis of heart signals. The ECG signals are applied into the system that performs an initial filtering, and then uses a Gustafson-Kessel fuzzy clustering algorithm for the signal classification and correlation. The classification indicated common heart diseases such as angina, myocardial infarction and coronary artery diseases. The system uses the European electrocardiogram ST-T Database (EDB) as a reference for tests and evaluation. The results prove the system can perform the heart disease detection on a data set reduced from 213 to just 20 samples, thus providing a reduction to just 9.4% of the original set, while maintaining the same effectiveness. This system is validated in a Xilinx Spartan(®)-3A FPGA. The field programmable gate array (FPGA) implemented a Xilinx Microblaze(®) Soft-Core Processor running at a 50MHz clock rate.
Microelectronics Journal | 2010
Paulo Crepaldi; Tales Cleber Pimenta; Robson Luiz Moreno
Temperature sensing circuits are used in a wide range of applications such as in the biomedical area, cold chain monitoring and industrial applications. In the biomedical area, temperature patient monitoring systems can be found in a wide range of hospital applications such as the intensive care unit, surgery rooms and clinical analysis. When the systems also incorporate also communication features, they form a telemedicine system in which the patients can be remotely monitored. The need of portability promotes a demand for sensors and signal conditioners that can be placed directly on the patient or even implanted. Implanted systems provide comfort for the patient during the physiologic data acquisition. These systems should operate preferably without a battery, in which the energy is obtained by inductive coupling (RF link). Implanted devices require low-voltage and low-power operation in a small silicon area in order to offer safety to the patient, mainly in terms of excessive exposure to RF. This work presents a low-voltage low-power temperature sensor, suitable for implanted devices. The circuit topology is based on the composite transistors operating in weak inversion, requiring extremely low current, at low-voltage (0.8V), with just 100nW power dissipation. The circuit is very simple and its implementation requires a small silicon area (0.062mm^2). The tests conducted in the prototypes validate the circuit operation.
ieee electronics, robotics and automotive mechanics conference | 2012
Gustavo Della Colletta; Luis H. C. Ferreira; Tales Cleber Pimenta; Paulo Crepaldi
This paper presents a new SAR A/D conversion architecture that uses a PWM modulator and a first order low pass filter as alternative to conventional DAC implementations. Design equations were derived and a circuit implementation is proposed. In order to validate the proposed architecture, a 4bit successive approximation A/D converter has been designed and simulated. Then the circuit layout was developed in 0.5u m CMOS process with CADENCE Virtuoso. Post layout simulations were performed using BSIM3v3 model in Spectre simulator. DNL and INL erros are less then 0.1LSB. The power consumption is only 16u W for a 2.5V power supply.
Archive | 2012
David Sebastiao Cabral; Robson Luiz Moreno; Tales Cleber Pimenta; Leonardo Zoccal; Paulo Crepaldi
© 2012 Crepaldi et al., licensee InTech. This is an open access chapter distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Implementation of Schottky Barrier Diodes (SBD) in Standard CMOS Process for Biomedical Applications
2011 Faible Tension Faible Consommation (FTFC) | 2011
Paulo Crepaldi; L.H. de Carvalho Ferreira; Robson Luiz Moreno; Leonardo Zoccal; T.C. Pimenta
This paper describes a voltage reference circuit based on composite transistors and operating in weak inversion mode. The voltage reference was fixed in 100mV and the supply voltage can be as low as 0.8V. The weak inversion allows small current too leading the total power in the nW range. Simulation results points to a deviation (3σ and process corner) less than ±1%. The reference is indicated to be used in biomedical applications specially those that use implanted devices. In these cases the temperature impact is minimized since the human body has an effective biological system to keep it constant at about 37°C.
international conference on microelectronics | 2010
Paulo Crepaldi; Tales Cleber Pimenta; Robson Luiz Moreno
This work presents the implementation of a CMOS Linear Voltage Regulator (LVR) used to power up bio-implanted systems. The topology is based on a classical structure of a Low Dropout Regulator (LDO) and receives his activation energy from a RF link characterizing a passive RFID tag. The LVR was designed to achieve important features like low power consumption, and a small silicon area without the need for any external discrete components. The low power operation represents an essential condition to avoid a high energy RF link, thus minimizing the power of the transmitter and the thermal effects on the patient tissues. The project was implemented in a 0.35µm CMOS process and a prototype was tested to validate the overall performance. The LVR output is regulated at 1V and supplies a maximum load current of 0.5mA @ 37°C. The load regulation is 13mV/mA and the line regulation is 39mV/V. The LVR total power consumption is 1.2mW.
ieee international workshop on medical measurements and applications | 2010
Paulo Crepaldi; Tales Cleber Pimenta; Robson Luiz Moreno; Edgar Charry Rodríguez
This paper describes a CMOS Linear Voltage Regulator (LVR) of an implanted physiological signal system (biosensor) that is used to monitor blood pressure. This system is part of a Wireless Biomedical Sensor (WBS). The LVR topology is based on a classical structure of a Low Dropout Regulator (LDO). The energy is received from a RF link, thus operating as a passive RFID tag. The LVR was designed to achieve important features like low power consumption, and a small silicon area without the need for any external discrete components. The low power operation represents an essential condition to avoid a high energy RF link, thus minimizing the power of the transmitter and the thermal effects on the patients tissues. It was implemented in a 0.35 µm CMOS process and the prototypes were tested to validate the overall performance.
international conference on vlsi design | 1997
Tales Cleber Pimenta; Luiz Lenarth G. Vermaas; Paulo Crepaldi; Robson Luiz Moreno
This paper presents the functional description and the design of a fully digital integrated circuit for thyristor firing control in a 1 /spl mu/m CMOS technology. The architecture is based on the equidistant firing method, which allows the change of the displacement between two consecutive pulses before the zero crossing of the AC power source that is used as a synchronism signal. The circuit is designed fully digital, thus requiring no adjustments and providing high reliability and low cost. In this paper the performance of the circuit is shown by the simulation results under different operation conditions.
international conference on microelectronics | 2012
Sebastiao Cabral; Leonardo Zoccal; Paulo Crepaldi; Tales Cleber Pimenta
This paper presents and discusses the implementation of a Schottky Barrier Diode (SBD) in standard CMOS technology as a way to optimize the overall performance of a passive RadioFrequency Identification (RFID) based biomedical implants. It is essential to limit the transmitted power in passive tags, mainly for biomedical applications in order to avoid damaging the human tissues due to local overheating. The implementation of the SBD was obtained by changing the mask flow without any modification to the CMOS fabrication process. The procedure maintains the transistors functionality and adds a new device to a standard CMOS technology. The fabricated SBD structures present a low turn on voltage of approximately 300 mV and low capacitance that are important parameters for passive RFID.