Pekka Keranen

Fluorescence suppression in Raman spectroscopy using a time-gated CMOS SPAD

A Raman spectrometer technique is described that aims at suppressing the fluorescence background typical of Raman spectra. The sample is excited with a high power (65W), short (300ps) laser pulse and the time position of each of the Raman scattered photons with respect to the excitation is measured with a CMOS SPAD detector and an accurate time-to-digital converter at each spectral point. It is shown by means of measurements performed on an olive oil sample that the fluorescence background can be greatly suppressed if the sample response is recorded only for photons coinciding with the laser pulse. A further correction in the residual fluorescence baseline can be achieved using the measured fluorescence tails at each of the spectral points.

Wide-Range Time-to-Digital Converter With 1-ps Single-Shot Precision

A high-resolution time-to-digital converter (TDC) was designed and tested. The converter is based on the fundamental method of counting the full clock cycles of a low-phase-noise reference clock and using a single-stage interpolating method employing time-to-amplitude converters that are based on Miller integrators. Counters and other control logic were implemented on a field-programmable gate array, and the interpolation units were constructed using discrete components. The single-shot precision of the uncompensated converter is about 1.8 ps over a time interval range of 0 to 328 μs. Single-shot precision is limited by the nonlinearities of the interpolators. These measurement errors caused by the nonlinearities are systematic, and thus, precision can be improved to 1 ps by a simple integral nonlinearity compensation. Other important factors that contribute to single-shot precision are the N -cycle jitter of the reference clock and the noise generated by the TDC circuit itself. By careful design, these errors can be made small enough to achieve picosecond-level precision.

A Multitime-Gated SPAD Line Detector for Pulsed Raman Spectroscopy

A time-gated 2 × (4) × 128 single photon avalanche diode line detector for pulsed laser Raman spectroscopy has been developed and fabricated in a 0.35-μm high-voltage CMOS technology. The sample is illuminated with short laser pulses (~100 ps) at a rate of ~50 kHz and four time gates synchronized with these pulses and having selectable widths within the subnanoseconds range are used to measure the Raman photons and fluorescence background simultaneously. The fluorescence background measurement is used to suppress the residual fluorescence level to improve the quality of the Raman spectrum. The variation in the width of the time window was measured to be approximately ±17.5 ps along the spectral axis when set externally to a nominal value of 100 ps. Measurements with a reference sample demonstrate the effect of nonhomogeneities in the time gates on the quality of the recorded Raman spectrum and the residual fluorescence correction.

Oscillator Instability Effects in Time Interval Measurement

State-of-the-art TDCs can have a precision close to one picosecond, for which reason clock instability is starting to be one of the most significant factor limiting the precision. This paper provides methods to estimate clock jitter induced error by phase noise PSD measurements. Due to the different noise processes of the power-law model, convergence problems might restrict the time domain conversion of clock instabilities. Since time interval measurement corresponds to measuring the first difference of phase error, the convergence problems cannot be completely avoided as is usually done when characterizing frequency instabilities in time domain by measuring the 2nd differences of the phase error. This issue is addressed by taking into account the finite observation window of the phase error. Also a simple PSD measurement technique is introduced to provide an estimate of the jitter due to noise floor with an unknown bandwidth. Spurious tones in the phase noise PSD are also shown to have a significant impact on the precision of a TDC. The results are confirmed by several measurements done with a time-to-digital converter having a 1-ps precision.

CMOS technology scaling advantages in time domain signal processing

This paper compares two CMOS technologies, the robust 350nm version and its modern 28nm successor, in terms of time-domain signal processing parameters. The evaluated parameters; propagation delay, delay variation due to process and mismatch fluctuations, sensitivity to noise and area and power usage are crucial especially in measurement devices relying on precise timings, high precision time-to-digital converters, for example. Post-layout simulations show that the modern scaled technology offers superior speed, efficient area usage and low power consumption but suffers from considerable delay mismatch. Therefore applications relying on precise time domain signal processing do not always benefit from technology scaling.

Algorithmic time-to-digital converter

A novel time-to-digital converter is proposed. The TDC is based on a ring oscillator, and operates by switching the oscillation frequency in a cyclic manner. The operating principle resembles a cyclic/algorithmic ADC, where the quantization error is amplified and quantized recursively. Due to the recursive operation, the TDC can achieve very high resolution. Resolution is mainly limited by nonlinearities and the phase noise of the ring oscillator. Simulations on a standard 0.35μm CMOS process show that a maximum error due to process variations and mismatch is about ±2ps when the TDC is properly calibrated. Noise induced measurement error was simulated to have a standard deviation of 0.3ps.