Peter Fazekas
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Featured researches published by Peter Fazekas.
IEEE Transactions on Electron Devices | 1979
Eckhard Wolfgang; Rudolf Lindner; Peter Fazekas; Hans-Peter Feuerbaum
The voltages at the internal voltage nodes of an IC have to be measured if the device operates imperfectly or the quality of a device or computer simulation have to be checked. Whereas the mechanical probe conventionally used for this purpose usually imposes such a large capacitive load on the specimen that its performance undergoes a change, the electron probe is both nonloading and nondestructive and can be used not only for quantitative waveform measurements on an IC but also for obtaining images of the logical states of relatively large portions of its circuit configuration. Since each type of configuration calls for a separate measuring technique, six different techniques are treated and their application and equipment needs described. The state of the art of electron-beam testing is demonstrated with reference to three typical applications, viz., checking a decoding schema, measuring the sense signal (approximately 300 mV) of a 16-kbit MOS RAM, and checking the operation of the timing circuitry of a 4-bit microprocessor. The present applicational limitations and future perspectives of electron-beam testing are discussed.
international test conference | 1988
Hironobu Niijima; Yasuo Tokunaga; Shouichi Koshizuka; Kazuo Yakuwa; Peter Fazekas; Mathias Sturm; Hans-Peter Feuerbaum
An integrated EB (electron-beam) testing system is constructed for precise failure analysis and reduction of total testing time, coupling a VLSI tester and an EB tester. Unique features of the system are briefly described, together with its system configuration and functions. The close connection of LSI testing and EB testing environments is further continued. It is planned to improve the integrated system to enable a simultaneous display of EB testing data in the LSI testing environment, with which it becomes possible to superimpose the EB pin data into the timing chart of normal pin data in the LSI testing. This type of connection of two environments is quite powerful and will be used in a standard testing method.<<ETX>>
Microelectronics Reliability | 1985
Peter Fazekas
A method and apparatus for conducting a fast internal logic check of integrated circuits whereby the operations on all data lines of a data bus can be simultaneously represented employ a pulsed electron beam as a measuring probe, a scan generator for changing the position of the measuring probe, an evaluator for the potential-contrast signal, a computer or logic analyzer for evaluating the measured values, and a sequence control device for controlling the sequence of operation of the method and device. Given a fixed phase relation of the program cycle of the integrated circuit to be checked, the pulsed electron beam is successively directed to different test locations and the potential-contrast signal for each test location is registered and logically evaluated. The test results gained at the various phase relations are relayed to the logic analyzer and evaluated therein.
Archive | 1982
Peter Fazekas; Hans-Peter Feuerbaum; Ulrich Knauer; Johann Otto
Archive | 1988
Peter Fazekas
Archive | 1984
Peter Fazekas
Archive | 1983
Peter Fazekas; Johann Otto
Archive | 1985
Hans-Peter Feuerbaum; Peter Fazekas
Archive | 1985
Hans-Peter Feuerbaum; Peter Fazekas
Archive | 1981
Peter Fazekas; Hans-Peter Dr Feuerbaum; Ulrich Knauer; Johann Otto