Peter J. Kindlmann

A Simple Juggling Robot: Theory and Experimentation

We have developed a formalism for describing and analyzing a very simple representative of a class of robotic tasks which involve repeated robot-environment interactions, among them the task of juggling. We review our empirical success to date with a new class of control algorithms for this task domain that we call “mirror algorithms.” These new nonlinear feedback algorithms were motivated strongly by experimental insights after the failure of local controllers based upon a linearized analysis. We offer here a proof that a suitable mirror algorithm is correct with respect to the local version of a specified task — the “vertical one-juggle” — but observe that the resulting ability to place poles of the local linearized system does not achieve noticeably superior transient performance in experiments. We discuss the further analysis and experimentation that should provide a theoretical basis for improving performance.

Implementing and evaluating adiabatic arithmetic units

In recent years, several adiabatic logic architectures have been proposed for low-power VLSI design. However, no work has been presented describing the implementation and evaluation of nontrivial adiabatic circuits. We have evaluated a specific adiabatic architecture and used it in the design of low-power arithmetic units. We investigated implementation issues specific to adiabatic system development and performed a systematic comparison of our designs with corresponding CMOS circuits. In this paper we describe our adiabatic designs, discuss implementation issues at the logic and architectural level, and report our empirical findings.

A family of robot control strategies for intermittent dynamical environments

A formalism is developed for describing and analyzing a very simple representative class of robotic tasks that require dynamical dexterity-among them, the task of juggling. The authors review their empirical success to date with a new class of control algorithms for this task domain, called mirror algorithms. The formalism for representing the task domain and encoding within it the desired robot behavior enables them to prove that a suitable mirror algorithm is correct with respect to a specified task.<<ETX>>A formalism is developed for describing and analyzing a very simple representation of a class of robotic tasks which require dynamical dexterity, among them the task of juggling. Empirical success has been achieved with a class of control algorithms for this task domain, called mirror algorithms. Using the formalism for representing the task domain, and encoding within it the desired robot behavior, it can be proven that a suitable mirror algorithm is correct with respect to a special task. Although the generation of algorithm geometry is completely heuristic at present, the analytical tractability of the resulting robot-environment closed loop, which is demonstrated, raises the hope that sufficient understanding may soon be realized to afford automatic translation of suitably expressed task definitions into provable correct empirically valid robot controller designs.<<ETX>>

Phase Stabilized Vernier Chronotron

A 500 channel system is described for measuring time intervals up to 1 μsec in 2 nsec increments. The vernier chronotron method of Lefevre and Russell is modified by the addition of a stable time base which phase‐locks the circulation period of each loop and thus stabilizes the channel width. Solid state circuit elements are used throughout. The application of this time analyzer to the measurement of lifetimes of excited atomic states is discussed.

Design and Evaluation of Adiabatic Arithmetic Units

Adiabatic design is an attractive approach to reducingenergy consumption in VLSI circuits after exhausting the potentialof conventional energy-saving techniques. Despite the plethoraof adiabatic logic architectures that have been proposed in recentyears, several practical considerations in the design of nontrivialadiabatic circuits remain largely unexplored. Moreover, it isstill unclear whether adiabatic circuits of significant sizeand complexity can achieve substantial savings in energy dissipationover corresponding conventional designs. We recently designedseveral low-power arithmetic units using a dual-rail adiabaticlogic design style. We also designed static CMOS versions ofthese units and compared their energy dissipation with theircorresponding adiabatic designs. In this paper we describe ourimplementations, discuss architecture and logic-level issuesrelated to our adiabatic designs, and present the findings ofour empirical comparison. Our results suggest that adiabaticlogic can be used for the implementation of relatively complexVLSI circuits that dissipate significantly less energy than theircorresponding CMOS designs.

New Methods for Studying Gas Solid Reaction Kinetics Using Automated Resistance Monitoring

A new analog‐to‐digital method of monitoring and recording transient electrical resistance vs time data is described, together with its application to kinetic studies of gas/metal reactions at filament temperatures above 1000 K. Resistance measurements with a precision of 0.02% are recorded at up to 40/sec on paper tape to facilitate digital computer data processing. Owing to its speed and accuracy, the method is shown to permit reaction rate determinations during transient temperature operation; allowing a portion of the Arrhenius diagram to be obtained in a single experiment, and experiments through or up to phase transformation temperatures (e.g., filament melting). Illustrative results are presented and discussed for the F‐atom/platinum reaction, which exhibits a reaction rate maximum at a temperature well below the Pt melting point.

An integrated patch-clamp system with dual Input

We present the first, fully integrated, multi-channel implementation of a patch-clamp measurement system. The system was implemented in a 0.5 μm silicon-on-sapphire process. The system can record two simultaneous cell membrane currents up to ±20 μA with a rms noise of 8 pA in a 10 kHz bandwidth. The system can compensate for the capacitance and resistance of the pipette electrode, up to 10 pF and 100 MΩ respectively. The system die size is 3 × 3 mm and the power consumption is 5 mW per channel at 3.3 V.

Voltage Controlled Attenuator

A voltage controlled 50 Ω attenuator using photoresistors, variable over a range of 1.5 to 10 dB with a 0 to 10 V control voltage, is described. Useful frequency response is dc to 300 MHz, corresponding to a rise time of approximately 1 nsec. The programming speed is limited by the response of an incandescent bulb. The device can handle inputs of up to 50 V, provided an average power dissipation of 400 mW is not exceeded.

Sound synthesis: A flexible modular approach with integrated circuits

Recent interest in environmental art has generated a need for sophisticated but inexpensive sound synthesis and lighting control systems which can be manipulated by artists unfamiliar with electronics. A system philosophy that meets these requirements is described. Maximum flexibility through voltage control of audio variables by separate functional modules and input-output voltage compatibility among all the modules forms the basis of the system. Extensive use of integrated circuit technology offers low cost and high reliability. Specific examples of modules, including a complete description of one module (a voltage-controlled oscillator), are used to elucidate the system design philosophy. The 42 modules of 10 different types that were constructed demonstrate both the feasibility of the input-output compatibility approach and the advantages of integrated circuit technology.