Pujitha Weerakoon

Three-Dimensional Photodetectors in 3-D Silicon-On-Insulator Technology

We report on the design and measurement results of three-dimensional (3-D) photodetectors in a 0.18-mum silicon-on-insulator technology. The device measurements reported here show that the photodetectors can be used for the design of high-density imaging arrays in 3-D CMOS fabrication processes. The photodiodes respond to light in the range of 1-200 000 lx with currents of 2 fA to 300 pA and can be arranged in a 3-D stack. The phototransistors respond to light intensities of 5-200 000 lx with currents from 50 fA to 2.3 muA

Performance comparison of low current measurement systems for biomedical applications

In this paper, we report on the noise analysis of low current measurement systems for biomedical applications. We analyzed resistive feedback, capacitive feedback and current conveyor circuits for low current measurement systems. Detailed noise analysis are presented and matched with measurement data using a 0.5-µm fabrication process. Based on the theoretical analysis and the measurements, the capacitive feedback system provides better noise performance for the measurement of low current. The capacitive feedback is capable of measuring 700fA RMS at 10KHz sampling rate, whereas the resistive feedback provides 4pA and the current conveyor provides 600pA. This paper provides design guidelines to maximize the measurement performance of low current for biomedical instrumentation.

An Integrated Patch-Clamp Amplifier for High-Density Whole-Cell Recordings

We fabricated an integrated patch-clamp amplifier capable of recording nano-amperes of current in whole-cell patch recording. Patch-clamp amplifiers presently consist of a head-stage and a large controller box that contains many hundreds of components. Our design compresses the function of the head-stage and the controller box into one chip that can be mounted near the patch-clamp electrode and can be controlled through a high-speed serial bus paving the way for higher densities in parallel patch-clamp systems. We report on the electrical measurements from the fabricated device.

A low-noise miniaturized patch-clamp amplifier

We present measurement results from a low-noise miniaturized patch-clamp amplifier with electrode compensation. The patch clamp amplifier has less than 4 pA of rms noise at a 10 kHz bandwidth and is capable of accurately measuring nano-Amperes of current. The device measurements shown here show that the integrated amplifier can be used for the design of high-density patch-clamp arrays.

An integrated patch-clamp amplifier for high-throughput planar patch-clamp systems

We present a fully-integrated implementation of a patch-clamp measurement system. The system was implemented in a 0.5mum silicon-on-sapphire process and is capable of recording cell membrane currents up to plusmn20nA, with a rms noise of 5pA at 10kHz bandwidth. The system can compensate for the capacitance and resistance of the planar electrode, up to 20pF and 4MOmega respectively. The die size is 1150 by 700mum. The power consumption is 3.3mW at 3.3V. The integrated patch- clamp system will be used to fabricate high-throughput planar patch-clamp systems.

An integrated patch-clamp system with dual Input

We present the first, fully integrated, multi-channel implementation of a patch-clamp measurement system. The system was implemented in a 0.5 μm silicon-on-sapphire process. The system can record two simultaneous cell membrane currents up to ±20 μA with a rms noise of 8 pA in a 10 kHz bandwidth. The system can compensate for the capacitance and resistance of the pipette electrode, up to 10 pF and 100 MΩ respectively. The system die size is 3 × 3 mm and the power consumption is 5 mW per channel at 3.3 V.

Electrical Noise Analysis of an Integrated Patch-Clamp Amplifier

This paper presents an evaluation of electrical noise sources and signal-to-noise limitations in a fabricated integrated patch-clamp amplifier. We also present numerical calculation of the theoretical noise of the patch-clamp system. Our fabricated device was measured to have less than 4pA of rms noise at 10 kHz bandwidth, similar in performance to commercial bench- top systems. The integrated patch-clamp can accurately measure nano-Amperes of current and is intended for a high-throughput system that can screen a large number of cells in parallel. The fabricated device consumes 1480 by 1300 mum of silicon area and 3.2 mW at 3.3 V of power. The device was fabricated using AMI 0.5 mA Micron technology.

Vertically-Integrated Three-Dimensional SOI Photodetectors

We report on the design and measurement results of three-dimensional (3D) photo-detectors in a 0.18mum silicon-on-insulator technology. The photodiodes respond to light in the range of l-200,000lux with currents of 2fA to 300pA and can be arranged in a 3D stack. The phototransistors respond to light intensities of 5-200,000lux with currents from 50fA to 2.3muA. We also report spectral data obtained from the photodiode and show that a photodiode stack can be used to extract color information without the use of color filters. The data in this paper is essential to the design of advanced imaging arrays and color sensors in 3D SOI processes.