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Dive into the research topics where Peter R. Holloway is active.

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Featured researches published by Peter R. Holloway.


international solid-state circuits conference | 2006

Comparator-based switched-capacitor circuits for scaled CMOS technologies

Todd Sepke; John K. Fiorenza; Charles G. Sodini; Peter R. Holloway; Hae-Seung Lee

A comparator-based switched-capacitor circuit (CBSC) technique is presented for the design of analog and mixed-signal circuits in scaled CMOS technologies. The technique involves replacing the operational amplifier in a standard switched-capacitor circuit with a comparator and a current source. During charge transfer, the comparator detects the virtual ground condition in place of the opamp which normally forces the virtual ground condition. A prototype 1.5-bit/stage 10-bit 7.9-MS/s pipeline ADC was designed using the comparator-based switched-capacitor technique. The prototype ADC was implemented in 0.18-mum CMOS. It achieves an ENOB of 8.6 bits for a 3.8-MHz input signal and dissipates 2.5 mW


IEEE Journal of Solid-state Circuits | 2006

Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies

John K. Fiorenza; Todd Sepke; Peter R. Holloway; Charles G. Sodini; Hae-Seung Lee

A comparator-based switched-capacitor (CBSC) design method for sampled-data systems utilizes topologies similar to traditional opamp-based methods but relies on the detection of the virtual ground using a comparator instead of forcing it with feedback. A prototype 10b CBSC 1.5b/stage pipelined ADC is implemented in a 0.18mum CMOS process. The converter operates at 8MHz and consumes 2.5mW


IEEE Transactions on Circuits and Systems | 2009

Noise Analysis for Comparator-Based Circuits

Todd Sepke; Peter R. Holloway; Charles G. Sodini; Hae-Seung Lee

Noise analysis for comparator-based circuits is presented. The goal is to gain insight into the different sources of noise in these circuits for design purposes. After the general analysis techniques are established, they are applied to different noise sources in the comparator-based switched-capacitor pipeline analog-to-digital converter (ADC). The results show that the noise from the virtual ground threshold detection comparator dominates the overall ADC noise performance. The noise from the charging current can also be significant, depending on the size of the capacitors used, but the contribution was small in the prototype. The other noise sources have contributions comparable to those in op-amp-based designs, and their effects can be managed through appropriate design. In the prototype, folded flicker noise was found to be a significant contributor to the broadband noise because the flicker noise of the comparator extends beyond the Nyquist rate of the converter.


Archive | 1999

Linearized temperature sensor

Peter R. Holloway; Ravi Subrahmayan; Gary S. Sheehan


Archive | 2005

Digitizing temperature measurement system and method of operation

Peter R. Holloway; Eric D. Blom; Jun Wan; Stuart H. Urie


Archive | 1998

Methods and apparatus for reliably determining subthreshold current densities in transconducting cells

Peter R. Holloway


Archive | 2004

Synchronized delta-VBE measurement system

Jun Wan; Peter R. Holloway; Gary E. Sheehan


Archive | 2003

Low noise correlated double sampling modulation system

Peter R. Holloway; Eric D. Blom; Jun Wan


Archive | 2005

Self-regulating process-error trimmable PTAT current source

Peter R. Holloway; Jun Wan


Archive | 2004

Power-on reset circuit with low standby current and self-adaptive reset pulse width

Peter R. Holloway; Jun Wan

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Jun Wan

National Semiconductor

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Hae-Seung Lee

Massachusetts Institute of Technology

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Todd Sepke

Massachusetts Institute of Technology

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John K. Fiorenza

Massachusetts Institute of Technology

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