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Dive into the research topics where Phaklen Ehkan is active.

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Featured researches published by Phaklen Ehkan.


international conference on electronic design | 2014

Energy consumption optimization with Ichi Taguchi method for Wireless Sensor Networks

Mohamed Elshaikh; Mohd Nazri Mohd Warip; Ong Bi Lynn; R. Badlishah Ahmad; Phaklen Ehkan; Fazrul Faiz Zakaria; Fairul Afzal Ahmad Fuad

Wireless Sensor Networks (WSN) consists of sensor nodes for monitoring and reporting sensible changes on a field to a specific server. One of the applications of WSN is large area monitoring, where sensor nodes are placed in far fields with limited power sources. Due to the adhered reason, the energy consumption of sensor nodes is considered as one of the major challenge in WSN. Many factor in WSN contributes to energy consumption such as Medium Access Control protocol (MAC), the network topology, and routing protocol. With the variety of factors that affects the energy consumption in WSN; the challenge of optimizing WSN networks toward a low energy consumption is becoming a hard problem. In the literature many efforts are paid for designing, implementing, and improving protocols in terms of power consumption. However, few efforts are paid for optimizing the existing protocols and other network parameters toward a green technology. This paper focuses in WSN infrastructure and protocols optimization by introducing the Ichi Taguchi (Taguchi) optimization method. Taguchi method is used to predict the best design parameters to achieve optimal performance parameters. Moreover, Taguchi method is used to optimize the energy consumed by sensor nodes against network protocols and network topology design parameters. A simulation experiments are curried out on the discrete event simulator OMNET++ for the purposes of this research paper. The obtained results show the impact of the network protocols toward the energy consumption. Furthermore, a proposed network topology and protocols set is introduced, and compared against the existing once.


Computers and Electronics in Agriculture | 2016

New empirical path loss model for wireless sensor networks in mango greenhouses

Auda Raheemah; Naseer Sabri; M. S. Salim; Phaklen Ehkan; R. Badlishah Ahmad

FSPL and 2-Ray models are inaccurate to be used in conjugation with foliage models to predicted total path loss in vegetation environments and it has (38.20% and 65.74%) MPAE.The path loss model based COST235 and FSPL was the best performance to the empirical measurements, but its still not optimum due to that the MAPE was 10.69%.New empirical path loss model (LRCFM) for mango greenhouse has MAPE about 2.75% as compared to other models. Signal propagation losses in protected environments are investigated using wireless sensor networks (WSNs) based on the IEEE 802.15.4 standard of operating frequency, 2.425GHz. In this research, various empirical measurements were conducted to examine the effects of each part of a tree on path loss using different transceiver heights. A new linear path loss regression curve-fitting model (LRCFM) was derived based on the regression technique of computing the total path loss inside the greenhouse environment. The greatest vegetation effects appear within 1.5m tree height; in this research, this height was adopted to study and analyse vegetation models in a mango greenhouse. This research proves that path loss prediction based on free space path loss (FSPL) and two-ray (2-Ray) propagation models is inaccurate in predicting loss in certain environments, as these approaches are simplistic and optimistic. Thus, most known foliage models used in conjugation with FSPL and 2-Ray are inaccurate in predicting the total path loss in a greenhouse environment. The analytical and empirical results prove that the new derived model, the LRCFM, is the best candidate compared to other foliage models. The mean absolute percentage error (MAPE) of the total path loss based on the new LRCFM model was 2.7% compared to the 10.69% of the well-known models.


Archive | 2015

The Evolution of Double Weight Codes Family in Spectral Amplitude Coding OCDMA

N. Din Keraf; S. A. Aljunid; A. R. Arief; Phaklen Ehkan

This paper presents the review of Double Weight (DW) codes family from perspective of codes evolution since beginning until now. First generation focuses on one-dimensional (1D) code which spreading has been carried out in time. Later, the second generation was introduced known as two-dimensional (2D) code where the encoding of data bit has spread in both wavelength and time domain. Codes construction and variety of detection techniques scheme used in DW codes family are also discussed. In this paper we focus on structure of among DW codes family as all the design of code sequence aim to eliminate Multiple Access Interference (MAI). Previous papers of DW codes family show a good quality of transmission and satisfactory the standard quality of Bit Error Rate (BER) above 10−9.


international conference on electronic design | 2014

An optimal cardinality of wavelength/time incoherent OCDMA system using 2-D hybrid FCC-MDW code

N. Din Keraf; S. A. Aljunid; A. R. Arief; M. S. Anuar; C. B. M. Rashidi; Phaklen Ehkan; M. N. Nurol

A 2-Dimensional (2-D) Wavelength/Time (W/T) scheme is proposed for spectral amplitude coding OCDMA network system. The new hybrid codes are utilizing Flexible Cross Correlation (FCC) and Modified Double Weight (MDW) codes which both codes have good correlation properties and capable to suppress multiple access interference (MAI). From the numerical calculation, it has been shown that this new hybrid code effectively suppresses the phase Induced Intensity Noise (PIIN) and eliminates MAI. Furthermore, the cardinality of this proposed code accommodates 150% and 275% improvement compared to 2-D PD code and 2-D M-Matrices code respectively at the BER=10-9. As a result, the performance of the system can be improved as well as support much more simultaneous users compared to Perfect Difference (PD) and M-matrices codes.


asia modelling symposium | 2013

5mm X 5mm Copper-Diamond Composite Slug Stress Evaluation on LED

Rajendaran Vairavan; Zaliman Sauli; Vithyacharan Retnasamy; Phaklen Ehkan; Ong Tee Say

Light-emitting diodes (LEDs), have materialized as an innovative light source which features energy saving properties, good optical performance and efficacy which is added advantage over orthodox lighting systems. However, the efficacy of the LED is influenced by heat generated at the junction of the LED. Hence, in this study, the thermal and stress analysis of single chip LED package with copper diamond heat slug with dimension of 5mm x 5mm x 1mm was carried out through simulation under natural convection condition. Input power of 0.1W and 1W were applied to the single chip LED model. Result of the simulation indicates that at input power 1W, junction temperature of 107.02 °C and stress of 104.59 MPa were obtained.


Wireless Networks | 2018

Discrete framelet transform based OFDM system using N-FRAT mapping over Rayleigh fading channel

Suha Q. Hadi; Phaklen Ehkan; M. S. Anuar; Sameer A. Dawood

This article proposes an N-finite Radon transform (N-FRAT) and a discrete framelet transform (FT) for the design of a new orthogonal frequency division multiplexing (OFDM) system. In the proposed system, the inverse FT (IFT) and FT were used instead of the inverse fast Fourier transform (IFFT) and fast Fourier transform (FFT) to realize multicarrier modulation and demodulation techniques, respectively. Simultaneously, it was suggested that the N-FRAT technique operate as a data mapper instead of the conventional phase shift keying (PSK) and quadrature amplitude mapping (QAM), which are usually used with the traditional OFDM system. The usage of the N-FRAT and FT in the proposed system led to an increase in the orthogonality between the subcarriers due to the application of IFFT in the N-FRAT, which was added to improve the orthogonality and time–frequency localization properties of the FT. Furthermore the proposed structure improved the bandwidth efficiency through the elimination of the cyclic prefix compared to the traditional system. The proposed system was simulated and compared with other OFDM systems, such as FFT based OFDM using N-FRAT mapping (N-FRAT-FFT-OFDM), FT based OFDM using QAM mapping (QAM-FT-OFDM), and FFT based OFDM using QAM mapping (QAM-FFT-OFDM). The simulation was performed over frequency selective fading channel using MATLAB technical programming language. The results of simulations showed that the new structure outperformed the other three systems by reducing the inter-symbol interference (ISI) and inter-carrier interference (ICI), which then improved the bit error rate (BER) performance.


Archive | 2015

Hardware Implementation of MFCC-Based Feature Extraction for Speaker Recognition

Phaklen Ehkan; Fazrul Faiz Zakaria; Mohd Nazri Mohd Warip; Z. Sauli; Mohamed Elshaikh

The most important issues in the field of speech recognition and representative of the speech is a feature extraction. Feature extraction based Mel Frequency Cepstral Coefficient (MFCC) is one the most important features required among various kinds of speech application. In this paper, FPGA-based for speech features extraction MFCC algorithm is proposed. The complexities of computational as well as the requirement of memory usage are characterized, analyzed, and improved. Look-up table (LUT) scheme is used to deal with the elementary function value in the MFCC algorithm and fixed-point arithmetic is implemented to reduce the cost under accuracy study. The final feature extraction design is implemented effectively into the FPGA-Xilinx Virtex2 XC2V6000 FF1157-4 chip.


international conference on electronic design | 2014

The effects of CPU load & idle state on embedded processor energy usage

Shuhaizar Daud; R. Badlishah Ahmad; Ong Bi Lynn; Zahereel Ishwar Abd. Kareem; Latifah Munirah Kamaruddin; Phaklen Ehkan; Mohd Nazri Mohd Warip; Rozmie R. Othman

Device power consumption is a serious design consideration especially for embedded systems. By reducing the power consumption of a particular system, we could effectively prolong the runtime of the system, allowing for longer operational condition of a particular system. Previous studies have suggested that the power characteristics of a modern embedded processor have since been improved with manufacturers implementation of better energy-focused designs. Implementation of hardware optimization such as better clock and power gating have been shown to produce better energy usage during on-load and off-load processing. In this paper we benchmarked the energy use of a modern embedded processor and study the effects of idling time to the processor and system energy usage. We have found that the processor energy use is significantly reduced in the instant that the processor goes idle during the execution process. The idling time during a processing timeslice allows the processor to use significantly less energy without explicitly depending on a frequency scaling algorithm to reduce energy consumption. This power saving feature directly implemented inside the processor hardware have the possibility to render software based frequency scaling algorithm and DVFS method to be less effective in reducing energy usage.


international conference on electronic design | 2016

Calculation of hybrid multi-layered perceptron neural network output using matrix multiplication

Lee Yee Ann; Phaklen Ehkan; Mohd Yusoff Mashor; S. M. Sharun

After some studies on the HMLP neural network output equation, it was found out that parts of the equation resemble matrix multiplication operation. Therefore, an approach to calculate the output equation of the HMLP using matrix multiplication method was proposed. The proposed approach was simulated and compared with another approach to calculate HMLP output using loops. The result proved that the output of the HMLP calculated using matrix multiplication method is the same as when being calculated using looping method. When comparing the processing time of both methods, the matrix multiplication method is faster than looping method for HMLP with more nodes. However, looping method calculated the output faster for HMLP with less nodes. This paper presents part of an ongoing study with the goal to develop an architecture for implementing the HMLP on FPGA.


Archive | 2016

Possibility of Hybrid Multilayered Perceptron Neural Network Realisation on FPGA and Its Challenges

Lee Yee Ann; Phaklen Ehkan; M.Y. Mashor

This paper reviewed the artificial neural network (ANN), a type of ANN called Hybrid Multilayered Perceptron (HMLP) and existing implementation of ANN on FPGA hardware. The structure of ANN and HMLP is discussed thoroughly. Past works involving HMLP had been reviewed and the HMLP had shown promising improvement over classic MLP. FPGA had seen increasing use for implementing various ANN, however ANN implementations on FPGA had encountered many challenges as discussed in this paper. After the review, it was found that, currently, no implementation of HMLP on FPGA was ever reported. Therefore a novel approach to implement the HMLP directly on FPGA is proposed at the end of the paper. The performance of the proposed FPGA-HMLP is expected to be better due to the characteristic similarity of ANN and FPGA.

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Zaliman Sauli

Universiti Malaysia Perlis

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M. S. Anuar

Universiti Malaysia Perlis

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Mohamed Elshaikh

Universiti Malaysia Perlis

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Ng Yen Phing

Universiti Malaysia Perlis

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