Phaophak Sirisuk

FPGA Implementation of MPPT Using Variable Step-Size P&O Algorithm for PV Applications

This paper describes FPGA implementation of a maximum power point tracking (MPPT) for photovoltaic (PV) applications. By slightly modifying the original algorithm, an improved variable step-size P&O algorithm is realized and efficiently implemented using a hardware description language (VHDL). Subsequently, the new MPPT algorithm integrated with a solar-powered battery charging system is implemented on the XC2C384 FPGA without external sensor unit requirement. Experimental results with a commercial PV array show that the proposed algorithm outperforms the conventional controller in terms of tracking speed and mitigation of fluctuation output power in steady state operation. The overall system efficiency is well above 96%

RISC-microcontroller built-in fuzzy logic controller of maximum power point tracking for solar-powered light-flasher applications

This paper presents the development of maximum power point tracking (MPPT) using a fuzzy logic controller (FLC). By applying the synthetic fuzzy inference algorithm, the relationship between input and output of FLC can be effectively stored in a memory-limited lookup table (LUT). As a consequence, the controller can be efficiently implemented on a low-cost 16F872 RISC microcontroller. A practical system found in a transportation industry, particularly a solar-powered light-flasher (SPLF) with built in MPPT using FLC, is developed. Simulations with practical parameters show that our proposed MPPT using FLC implemented by LUT outperforms the conventional MPPT controller in terms of tracking speed. Furthermore, experimental results are shown to demonstrate the superiority of the proposed technique.

A Solar-powered Battery Charger with Neural Network Maximum Power Point Tracking Implemented on a Low-Cost PIC-microcontroller

This paper presents the development of a maximum power point tracking algorithm using an artificial neural network for a solar power system. By applying a three layers neural network and some simple activation functions, the maximum power point of a solar array can be efficiently tracked. The tracking algorithm integrated with a solar-powered battery charging system has been successfully implemented on a low-cost PIC16F876 RISC-microcontroller without external sensor unit requirement. The experimental results with a commercial solar array show that the proposed algorithm outperforms the conventional controller in terms of tracking speed and mitigation of fluctuation output power in steady state operation. The overall system efficiency is well above 91%

RISC microcontroller built-in fuzzy logic controller for maximum power point tracking in solar-powered for battery charger

This paper presents the development of maximum power point tracking (MPPT) using a fuzzy logic controller (FLC). By applying the synthetic fuzzy inference algorithm, the relationship between input and output of FLC can be effectively stored in a memory-limited lookup table (LUT). As a consequence, the controller can be efficiently implemented on a low-cost 16F872 RISC microcontroller. The proposed controller is integrated with a boost converter for realization of a high performance solar-powered battery charger (SPBC). Simulations with practical parameters show that our proposed MPPT using FLC implemented by LUT outperforms the conventional MPPT controller in terms of tracking speed. Moreover, preliminary experimental results are presented.

Application of Maximum Power Point Tracker with Self-organizing Fuzzy Logic Controller for Solar-powered Traffic Lights

This paper presents the development of maximum power point tracking (MPPT) using an adjustable self-organizing fuzzy logic controller (SOFLC) for a solar-powered traffic light equipment (SPTLE) with an integrated maximum power point tracking (MPPT) system on a low-cost microcontroller. The proposed system is integrated with a boost converter for realizing of high performance SPTLE, whose adaptability properties are very attractive for operation of a solar array power tracking in dynamic environments. The proposed MPPT scheme obtained by varying the duty ratio for DC- DC boost converter has been successfully implemented on a low-cost PIC16F876A RISC-microcontroller. Experimental results of the hardware prototypes for SPTLE, light flasher and light chevron, with commercial solar array show that our proposed MPPT using SOFLC as compared with fuzzy logic controller (FLC) in terms of tracking speed with 92% of overall system efficiency.

A Switched-beam Element Phased Array Antenna for CMA Initialization

This paper proposes an initialization scheme for a constant modulus algorithm (CMA). The technique can significantly improve convergence properties of CMA, which is employed for weight adjustment of an adaptive antenna system. The technique exploits a beam of a switched-beam element phased array antenna with the maximum received power to initial CMA. In addition, a main beam of the antenna can be switched into more directions by utilizing four one-bit phase shifters. Antenna patterns are shown and selected for CMA initialization. Simulation results are shown to evaluate SINR performance of the proposed technique

Efficient parallel architecture for implementation of the CMA adaptive antenna

Abstract This paper presents an efficient parallel architecture for implementation of a constant modulus algorithm (CMA) adaptive array antenna. By inserting delay units into the original CMA, a novel delayed CMA (DCMA) that can significantly reduce the associated critical path is derived. Consequently, a pipelining architecture that supports parallel processing is introduced for implementation of the DCMA. In addition to the pipelining technique, a power-of-two multiplier is proposed for the DCMA leading to the efficient FPGA implementation. The effects of delays and finite word-length on the convergence property of CMA are investigated via simulations. Moreover, the synthesized results demonstrate that FPGA implementation of the proposed architecture using power-of-two arithmetic achieves 26.9% resource reduction in comparison with that of fixed-point arithmetic and operating clock frequency higher than 65 MHz. The implemented FPGA was tested to confirm that the designed architecture operates well for CMA.

Implementation of GA-trained GRNN for Intelligent Fast Charger for Ni-Cd Batteries

This paper presents the development of an intelligent genetic algorithm (GA) technique for training of a generalized regression neural network (GRNN) controller to achieve a compact network and to decrease battery charging time on a cost-effective RISC microcontroller. The suitable input-output data were selected from GA mechanism to establish GRNN. The computational complexity of GRNN can be reduced replaced by some simple polynomial forms. As a consequence, the fast charging device for nickel-cadmium (Ni-Cd) batteries can be efficiently implemented on a low-cost 16F876A RISC microcontroller. Experimental results are shown to demonstrate superiority of the proposed system

Implementation of switched-current FIR filter using distributed arithmetic technique: exploitation of digital concept in analogue domain

Recently, a distributed arithmetic (DA) technique has been employed in digital implementation of finite impulse response (FIR) filters, since it can significantly reduce hardware resources at the cost of higher clock frequency. In this paper, we show that the concept of DA can be efficiently exploited in an analogue domain. Specifically, a switched-current (SI) FIR filter is realized based upon the concept of DA. In addition, it is revealed that the DA SI FIR filter offers extended maximum achievable resolution normally dictated by transistor matching. The technique also helps reduce silicon area and power requirements. Two examples of FIR filter design according to WCDMA and cdma2000 specifications are presented to demonstrate the feasibility of the novel technique. Simulation results are shown to confirm the circuit functions.

Simple initialization scheme for CMA adaptive antenna by using digital beam synthesis

This paper presents a simple technique of initialization for CMA adaptive antenna. The technique utilizes digital beam synthesis for a circular array antenna to synthesize the beams in digital domain. The synthesized beam can be switched into different directions by choosing proper weight vectors. The weight vectors are calculated through a phased array principle. The beams obtained from the synthesis are employed to initial CMA in order to improve its convergence property. The technique makes the compact adaptive antenna using CMA possible. Simulation results show that the proposed technique can significantly improve the convergence property of CMA.